Patent classifications
G02B6/1228
OPTOELECTRONIC SEMICONDUCTOR DEVICE AND GLASSES
In at least one embodiment, the optoelectronic semiconductor device comprises a carrier, a first semiconductor laser configured to emit a first laser radiation and applied on the carrier, and a multi-mode waveguide configured to guide the first laser radiation and also applied on the carrier, wherein the multi-mode waveguide comprises at least one furcation and a plurality of branches connected by the at least one furcation.
FREQUENCY- AND PROCESS-INSENSITIVE SPLITTING USE MULTIPLE SPLITTERS IN SERIES
In some embodiments, the present disclosure relates to a device having a first waveguide and a second waveguide arranged over a substrate. The first waveguide has a first input terminal and a first output terminal, wherein the first input terminal is configured to receive light. The second waveguide is arranged laterally beside the first waveguide and has a second input terminal and a second output terminal. The second input terminal of the second waveguide is configured to receive light. The first waveguide further includes a first portion that has a different structure than surrounding portions of the first waveguide. The second waveguide further includes a second portion that has a different structure than surrounding portions of the second waveguide. The first waveguide is spaced apart at a maximum distance from the second waveguide at the first portion and the second portion.
Light Output Devices and Light Outputting Methods for Optical Systems
Configurations for an optical system used for guiding light and reducing back-reflection back in an output waveguide is disclosed. The optical system may include an output waveguide defined in a slab waveguide. The output waveguide may terminate before an output side of the slab waveguide, which may reduce the back-reflection of light from the output side back into the output waveguide. The output side may define an optical element that may steer the output light. The optical element may collimate the output light, cause the output light to converge, or cause the output light to diverge.
OPTICAL WAVEGUIDE EDGE COUPLING WITHIN A SUBSTRATE
Embodiments described herein may be related to apparatuses, processes, and techniques directed to dense integration of PICs in a substrate using an optical fanout structure that includes waveguides formed within a substrate to optically couple with the PICs at an edge of the substrate. One or more PICs may then be electrically with dies such as processor dies or memory dies. The one or more PICs may be located within a cavity in the substrate. The substrate may be made of glass or silicon. Other embodiments may be described and/or claimed.
Space division multiplexers
Space division multiplexers can include adapters between multicore fibers with different core patterns and/or add-drop multiplexers for multicore fibers.
Systems and methods for alignment of photonic integrated circuits and printed optical boards
Example implementations described herein are directed to an interface configured to redirect light between a connector connected to a printed optical board (POB) via an optical waveguide, and a photonic integrated circuit (PIC), the interface involving two-dimensionally distributed waveplates (TDWs) having multiple layers of p-doped and n-doped silicon, the TDWs configured to be driven to change a dielectric constant at a two dimensional location on the TDWs such that the received light is redirected at the two dimensional location.
Photonic integrated circuit system and method of fabrication
A photonic integrated circuit (PIC) system, preferably including a substrate, one or more photonic connections, and a plurality of circuit blocks. The circuit blocks preferably include one or more waveguides that are optically coupled to the photonic connections, such as by transition features. A method of PIC fabrication, preferably including defining a PIC structure and defining circuit blocks. The circuit blocks are preferably defined onto one or more template regions defined by the PIC structure. Photonic connections are preferably defined as part of the PIC structure. Transition features, such as transitions between the photonic connections and the circuit blocks, are preferably defined concurrently with defining the circuit blocks.
Photodetectors and terminators having a curved shape
Structures for a photodetector or terminator and methods of fabricating a structure for a photodetector or terminator. The structure includes a waveguide core having a longitudinal axis, a pad connected to the waveguide core, and a light-absorbing layer on the pad adjacent to the waveguide core. The light-absorbing layer includes an annular portion, a first taper, and a second taper laterally spaced from the first taper. The first taper and the second taper are positioned adjacent to the waveguide core.
Photonic coupler
A photonic coupler includes an input coupling section, an output coupling section, and a multimode interference (MMI) waveguide section. The input coupling section is adapted to receive an input optical signal along an input waveguide channel. The output coupling section is adapted to output a pair of output optical signals along output waveguide channels. The output optical signals having output optical powers split from the input optical signal. The MMI waveguide section is optically coupled between the input and output coupling sections. Notched waveguide sections may each be disposed between the MMI waveguide section and a corresponding one of the input or output coupling sections and/or the MMI waveguide section may include curvilinear sidewalls.
WAVEGUIDE PLATFORM
A waveguide platform and method of fabricating a waveguide platform on a silicon wafer; the method comprising: providing a wafer having a layer of crystalline silicon;
lithographically defining a first region of the top layer; electrochemically etching the wave-guide platform to create porous silicon at the lithographically defined first region; epitaxially growing crystalline silicon on top of the porous silicon to create a first upper crystalline layer with a first buried porous silicon region underneath; wherein the first buried porous silicon region defines a taper between a first waveguide region of crystalline silicon having a first depth and a second waveguide region of crystalline silicon having a second depth which is smaller than the first depth.