An optical receptacle of the present invention includes: a first optical surface configured to allow light emitted from the photoelectric conversion element to enter the optical receptacle; a second optical surface configured to emit, toward the optical transmission member, the light having entered through the first optical surface; a positioning part configured to position an end face of the optical transmission member in such a way that the end face faces the second optical surface; and a region disposed at an optical surface in the optical receptacle. The region is configured in such a way that as a distance from an emission position of the light on the second optical surface to a center of the second optical surface increases, a distance from a position where the light intersects a central axis of the second optical surface to the second optical surface increases.

A large single-photon avalanche diode (SPAD) array is integrated with optical waveguide (WG) based devices. SPAD is a very sensitive optical detector fabricated on a semiconductor chip and WG structures are also built into the same chip. WG structures are configured to accumulate SPAD detection current. Together, they form an ultra-sensitive optical detector with high-speed response and a large aperture.

A wavelength checker includes an optical waveguide chip. A known arrayed-waveguide diffraction grating is formed on the optical waveguide chip. The wavelength checker includes a light conversion unit made of a conversion material that converts infrared light into visible light. The light conversion unit is arranged on an output side of a plurality of first output waveguides of the optical waveguide chip to be capable of receiving light emitted from the plurality of first output waveguides. The light conversion unit is formed on a side surface of a support facing an output end surface of the optical waveguide chip. The support is fixed to a main board.

Embodiments herein describe using a double wafer bonding process to form a photonic device. In one embodiment, during the bonding process, an optical element (e.g., a high precision optical element) is optically coupled to an optical device in an active surface layer. In one example, the optical element comprises a nitride layer which can be patterned to form a nitride waveguide, passive optical multiplexer or demultiplexer, or an optical coupler.

An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.

An optical ferrule has a different thermal expansion coefficient than a substrate to which a optical device is mounted, the ferrule optically coupling the device to one or more optical fibers. The optical ferrule includes and/or a cradle in which the ferrule is mounted include lateral and longitudinal engagement feature that ensure alignment with the optical device at an operating temperature, the ferrule expanding relative to the substrate when transitioning to the operating temperature.

An optronic transceiver module is disclosed. The optronic transceiver module includes an m to n main optical coupler capable of splitting a downlink signal into n downlink optical signals of the same power to be transmitted in n optical fibres, a first uplink optical coupler capable of splitting an uplink signal into two optical signals split according to a predetermined reference power ratio and delivering a low-power signal and a high-power signal, a first power measurement photodiode delivering a power measurement associated with a first low-power signal, the main optical coupler being capable of aggregating the high-power optical signal and a second uplink optical signal representative of an optical signal received via a second optical fibre, into an aggregated uplink optical signal.

A photodetector structure over a partial length of a silicon waveguide structure within a photonic integrated circuit (PIC) chip. The photodetector structure is embedded within a cladding material surrounding the waveguide structure. The photodetector structure includes an absorption region, for example comprising Ge. A sidewall of the cladding material may be lined with a sacrificial spacer. After forming the absorption region, the sacrificial spacer may be removed and passivation material formed over a sidewall of the absorption region. Between the absorption region an impurity-doped portion of the waveguide structure there may be a carrier multiplication region, for example comprising crystalline silicon. If present, edge facets of the carrier multiplication region may be protected by a spacer material during the formation of an impurity-doped charge carrier layer. Occurrence of edge facets may be mitigated by embedding a portion of the photodetector structure with a thickness of the waveguide structure.

An optical package comprising an optical die that is electrically coupled to a package substrate, and an optical interconnect adjacent the optical die. The optical interconnect comprises a first polarizing filter adjacent to a first lens, a second polarizing filter adjacent to a second lens; and a film comprising a magnetic material between the first polarizing filter and the second polarizing filter. The second polarizing filter is rotated with respect to the first polarizing filter and the magnetic material is to rotate a polarization vector of light incoming to the optical interconnect. An optical fiber interface port is immediately adjacent to the first lens. The second lens is immediately adjacent to an optical interface of the optical die.

Embodiments described herein may be related to apparatuses, processes, and techniques related to creating deep cavities within a substrate or at an edge of the substrate, by etching a cavity in the substrate to a first copper stop layer, removing the first copper stop layer, and then etching deeper into the cavity to a second copper stop layer. In embodiments this process may be repeated until the desired cavity depth is reached. Other embodiments may be described and/or claimed.