An injection moulding apparatus and method for producing a moulded article is disclosed herein. In a described embodiment, the method comprises: (i) securing a layer of film to a part of a first mould half at step 504; (ii) adjusting relative position of the first mould component and a second mould component to an initial moulding position at step 506 to define a mould cavity; (iii) injecting molten moulding material into the mould cavity at step 508 to enable the molten moulding material to contact the layer of protective film; (iv) moving a movable core at step 510 to compress the molten moulding material in the mould cavity; and (v) cooling the compressed molten moulding material at step 514 to bond the layer of film to the cooled moulding material to form the moulded article.

Disclosed are an integrated packaged light engine and signal emitting and receiving method thereof. The light engine includes molded interconnection device in which ceramic substrate is embedded, laser chip, photodiode chip, optical driving chip, transimpedance amplifier chip, array lens module and optical fiber interface provided on the ceramic substrate; the signal transmitting method includes: S1, powering optical drive chip by external power supply; S2, transmitting external signal to optical drive chip, so that laser chip emits optical signal; S3, totally reflecting and then transmitting optical signal by array lens module. The signal receiving method includes: S1, optical signal entering optical fiber interface; S2, optical signal entering array lens module; S3, transmitting optical signal to photodiode chip by array lens module; S4, converting and then transmitting optical signal into electrical signal to transimpedance amplifier chip by photodiode chip; S5, transmitting electrical signal to external circuit by transimpedance amplifier chip.

Examples herein relate to optoelectronic assemblies. In particular, implementations herein relate to an optoelectronic assembly formed via a chip on wafer on substrate (CoWoS) process. The optoelectronic assembly includes a substrate, an interposer, and an electronic integrated circuit (EIC). Each of the substrate, interposer, and EIC includes opposing first and second sides. The EIC is flip-chip assembled to the first side of the interposer, and the interposer with the EIC assembled thereto is flip-chip assembled to the first side of the substrate. An overmold layer extends over the first side of the interposer and encapsulates the EIC. The overmold layer includes a cavity such that a region of the first side of the interposer is exposed. An optical component is positioned within the cavity and coupled to the first side of the interposer.

Examples herein relate to optoelectronic assemblies. In particular, implementations herein relate to an optoelectronic assembly formed via a chip on wafer on substrate (CoWoS) process. The optoelectronic assembly includes a substrate, an interposer, and an electronic integrated circuit (EIC). Each of the substrate, interposer, and EIC includes opposing first and second sides. The EIC is flip-chip assembled to the first side of the interposer, and the interposer with the EIC assembled thereto is flip-chip assembled to the first side of the substrate. An overmold layer extends over the first side of the interposer and encapsulates the EIC. The overmold layer includes a cavity such that a region of the first side of the interposer is exposed. An optical component is positioned within the cavity and coupled to the first side of the interposer.

Various embodiments may relate to a method of forming a photonic integrated circuit package (PIC). The method may include forming a redistribution layer (RDL) over a carrier. The method may also include forming a through hole or cavity on the redistribution layer. The method may additionally include providing a stop-ring structure, the stop-ring structure including a ring of suitable material, the stop-ring structure defining a hollow space, over the redistribution layer so that the hollow space is over the through hole or cavity. The method may further include arranging a photonic integrated circuit (PIC) die over the redistribution layer so that the photonic integrated circuit (PIC) die is on the stop-ring structure. The method may also include forming a molded package by forming a mold structure to at least partially cover the photonic integrated circuit (PIC) die to form the photonic integrated circuit package.

A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.

Disclosed are an integrated packaged light engine and signal emitting and receiving method thereof. The light engine includes molded interconnection device in which ceramic substrate is embedded, laser chip, photodiode chip, optical driving chip, transimpedance amplifier chip, array lens module and optical fiber interface provided on the ceramic substrate; the signal transmitting method includes: S1, powering optical drive chip by external power supply; S2, transmitting external signal to optical drive chip, so that laser chip emits optical signal; S3, totally reflecting and then transmitting optical signal by array lens module. The signal receiving method includes: S1, optical signal entering optical fiber interface; S2, optical signal entering array lens module; S3, transmitting optical signal to photodiode chip by array lens module; S4, converting and then transmitting optical signal into electrical signal to transimpedance amplifier chip by photodiode chip; S5, transmitting electrical signal to external circuit by transimpedance amplifier chip.

In the plug connector, the front end side of a fiber optic cable used for optical signal transmission is connected to, and rearwardly extends from, the rear end side of said plug connector and lateral terminals are arranged in each of a pair of lateral edge portions that extend in the forward-backward direction; at least one of the plug connector and receptacle connector has provided therein resilient members that generate a biasing force between the plug connector and receptacle connector in the forward-backward direction; and, a restricting portion, which provides a limiting value for the distance of relative displacement of the plug connector with respect to the receptacle connector in the direction of the biasing force under the action of the above-mentioned biasing force, is formed in the receptacle connector, and a restricted portion is formed in the plug connector.

There is provided an optical element mounted on a substrate and an optical coupling element mounted on the substrate. The optical coupling element includes a guide unit extending in a direction parallel to a plane of the substrate so as to fix an optical fiber. There is provided a mold resin layer formed on the substrate so as to cover the optical element and expose a side surface of the optical coupling element at one end of the guide unit. The optical element includes a light incidence/emission unit on a side surface perpendicular to the plane of the substrate, and the other end of the guide unit and the light incidence/emission unit are disposed to face each other.

A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.