G03F7/70441

MASK CORRECTION METHOD, MASK CORRECTION DEVICE FOR DOUBLE PATTERNING AND TRAINING METHOD FOR LAYOUT MACHINE LEARNING MODEL
20220373877 · 2022-11-24 ·

A mask correction method, a mask correction device for double patterning, and a training method for a layout machine learning model are provided. The mask correction method for double patterning includes the following steps. A target layout is obtained. The target layout is decomposed into two sub-layouts, which overlap at a stitch region. A size of the stitch region is analyzed by the layout machine learning model according to the target layout. The layout machine learning model is established according to a three-dimensional information after etching. An optical proximity correction (OPC) procedure is performed on the sub-layouts.

LITHOGRAPHY AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME

A method includes grouping, in a first layout, pattern regions which have duplicate layout patterns including weak regions as a group, calculating defect probabilities of the pattern regions, respectively, calculating a defect frequency and a defect rate of the group based on the defect probabilities of the pattern regions, predicting a degree of defects of a second layout of the pattern regions, based on the defect frequency and the defect rate, and performing an extreme ultraviolet (EUV) lithography process on a substrate, based on the second layout. The defect probabilities are calculated by performing an optical proximity correction (OPC) simulation on the pattern region, calculating a stochastic variation of a linewidth of a simulation pattern in the weak region as a Gaussian distribution, and defining a threshold linewidth, which is used as a reference of the random defect, in the Gaussian distribution.

METHOD FOR CORRECTING SEMICONDUCTOR MASK PATTERN AND SEMICONDUCTOR STRUCTURE FORMED BY APPLYING THE SAME
20220365418 · 2022-11-17 ·

A method for correcting a semiconductor mask pattern includes steps as follows: A pattern to be corrected in the semiconductor mask pattern is divided into a plurality of sub-blocks that are symmetrical to and coincide with each other. Then, an optical proximity correction (OPC) step is performed on one of the plurality of sub-blocks to obtain a modified template. At least one copy template is generated according to the modified template corresponding to the other ones of the plurality of sub-blocks. The modified template and the at least one copy template are spliced to form a correcting pattern to replace the original pattern to be corrected.

OPC OPERATION METHOD AND OPC OPERATION DEVICE
20220365444 · 2022-11-17 ·

An optical proximity correction (OPC) operation method and an OPC operation device are provided. The OPC operation method includes the following steps. A mask layout is obtained. If the mask layout contains at least one defect hotspot, at least one partial area pattern is extracted from the mask layout according to the at least defect hotspot. A machine learning model is used to analyze the local area pattern to obtain at least one OPC strategy. The OPC strategy is implemented to correct the mask layout.

FLOWS OF OPTIMIZATION FOR PATTERNING PROCESSES
20230047402 · 2023-02-16 · ·

A method to improve a lithographic process for imaging a portion of a patterning device pattern onto a substrate using a lithographic projection having an illumination system and projection optics, the method including: (1) obtaining a simulation model that models projection of radiation by the projection optics, wherein the simulation model models an effect of an obscuration in the projection optics, and configuring, based on the model, the portion of the patterning device pattern, and/or (2) obtaining a simulation model that models projection of radiation by the projection optics, wherein the simulation model models an anamorphic demagnification of radiation by the projection optics, and configuring, based on the model, the portion of the patterning device pattern taking into account an anamorphic manufacturing rule or anamorphic manufacturing rule ratio.

Mask layout correction method and a method for fabricating semiconductor devices using the same

Disclosed are mask layout correction methods and a method for fabricating semiconductor devices. The mask layout correction method comprises performing a first optical proximity correction on an initial pattern layout. The step of performing the first optical proximity correction includes providing a target pattern of the initial pattern layout with control points based on a first model, obtaining a predicted contour of the initial pattern layout by performing a simulation, and obtaining an error between the target pattern and the predicted contour from the control points. The control points include first control points on an edge of the target pattern and second control points in an inside of the target pattern. The step of obtaining the error includes acquiring first error values from the first control points, providing weights to the first error values, and acquiring second error values from the second control points.

METHOD FOR DETERMINING A MASK PATTERN COMPRISING OPTICAL PROXIMITY CORRECTIONS USING A TRAINED MACHINE LEARNING MODEL

A method for determining a mask pattern and a method for training a machine learning model. The method for determining a mask pattern includes obtaining, via executing a model using a target pattern to be printed on a substrate as an input pattern, a post optical proximity correction (post-OPC) pattern; determining, based on the post-OPC pattern, a simulated pattern that will be printed on the substrate; and determining the mask pattern based on a difference between the simulated pattern and the target pattern. The determining of the mask pattern includes modifying, based on the difference, the input pattern inputted to the model such that the difference is reduced; and executing, using the modified input pattern, the model to generate a modified post-OPC pattern from which the mask pattern can be derived.

Methods of tuning process models

Methods of constructing a process model for simulating a characteristic of a product of lithography from patterns produced under different processing conditions. The methods use a deviation between the variation of the simulated characteristic and the variation of the measured characteristic to adjust a parameter of the process model.

METHOD FOR RETICLE ENHANCEMENT TECHNOLOGY OF A DESIGN PATTERN TO BE MANUFACTURED ON A SUBSTRATE
20230035090 · 2023-02-02 · ·

Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.

Machine learning based model builder and its applications for pattern transferring in semiconductor manufacturing

A system and a method of optimizing an optical proximity correction (OPC) model for a mask pattern of a photo mask is disclosed. A machine learning (ML) based model builder includes an OPC model, measurement data and a random term generator. Random terms are generated in a M-dimensional space by the random term generator. The ML based model builder classifies the random terms to clusters by applying a classifying rule. A representative subset of the random terms is determined among the classified clusters, and the representative subset is added to the OPC model.