Patent classifications
G03F7/70608
Increasing signal-to-noise ratio in optical imaging of defects on unpatterned wafers
Disclosed herein is a method for increasing signal-to-noise (SNR) in optical imaging of defects on unpatterned wafers. The method includes: (i) irradiating a region of an unpatterned wafer with a substantially polarized, incident light beam, and (ii) employing relay optics to collect and guide, radiation scattered off the region, onto a segmented polarizer comprising at least four polarizer segments characterized by respective dimensions and polarization directions. The respective dimensions and polarization direction of each of the at least four polarizer segments are such that an overall power of background noise radiation, generated in the scattering of the incident light beam from the region and passed through all of the at least four polarizer segments, is decreased as compared to utilizing a linear polarizer.
EUV MICROSCOPE
An EUV microscope apparatus utilizing a source of EUV light. The light is sent to a collector which creates a first focused EUV beam. A monochromator module receives the first focused EUV beam and produces a second focused EUV beam that is passed to an illumination module. The output of the illumination module is reflected off a mask. The reflected beam from the mask is sent to a zone-plate and a detector to produce an image.
Lithography method using multiscale simulation, and method of manufacturing semiconductor device and exposure equipment based on the lithography method
A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.
Systems and methods for predicting layer deformation
A method involving obtaining a resist deformation model for simulating a deformation process of a pattern in resist, the resist deformation model being a fluid dynamics model configured to simulate an intrafluid force acting on the resist, performing, using the resist deformation model, a computer simulation of the deformation process to obtain a deformation of the developed resist pattern for an input pattern to the resist deformation model, and producing electronic data representing the deformation of the developed resist pattern for the input pattern.
EUV LIGHT GENERATION APPARATUS, ELECTRONIC DEVICE MANUFACTURING METHOD, AND INSPECTION METHOD
An EUV light generation apparatus to generate EUV light by irradiating a target with pulse laser light to turn the target into plasma includes a chamber, a target supply unit configured to supply the target to a plasma generation region in the chamber, a pulse laser device configured to generate pulse laser light to be radiated to the target, and a processor configured to change a generation frequency of the target generated by the target supply unit to a natural number multiple of an irradiation frequency of the pulse laser light based on a size of the target or related information related to the size of the target.
METHOD FOR CORRECTING CRITICAL DIMENSION MEASUREMENTS OF LITHOGRAPHIC TOOL
A method for correcting critical dimension (CD) measurements of a lithographic tool includes steps as follows. A correction pattern having a first sub-pattern parallel to a first direction and a second sub-pattern parallel to a second direction is provided on a lithographic mask; wherein the first sub-pattern and the second sub-pattern come cross with each other. A first After-Develop-Inspection critical dimension (ADI CD) of a developed pattern formed on a photo-sensitive layer and transferred from the correction pattern is measured using the lithographic tool along a first scanning direction. A second ADI CD of the developed pattern is measured using the lithographic tool along a second scanning direction. The first ADI CD is subtracted from the second ADI CD to obtain a measurement bias value. Exposure conditions and/or measuring parameters of the lithographic tool are adjusted according to the measurement bias value.
Measurement of properties of patterned photoresist
A method for optical inspection includes illuminating a patterned polymer layer on a semiconductor wafer with optical radiation over a range of infrared wavelengths, measuring spectral properties of the optical radiation reflected from multiple points on the patterned polymer layer over the range of infrared wavelengths, and based on the measured spectral properties, computing a complex refractive index of the patterned polymer layer.
Method of manufacturing photo masks
In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.
Selection of measurement locations for patterning processes
A process of selecting a measurement location, the process including: obtaining pattern data describing a pattern to be applied to substrates in a patterning process; obtaining a process characteristic measured during or following processing of a substrate, the process characteristic characterizing the processing of the substrate; determining a simulated result of the patterning process based on the pattern data and the process characteristic; and selecting a measurement location for the substrate based on the simulated result.
Process-induced displacement characterization during semiconductor production
A controller is configured to perform at least a first characterization process prior to at least one discrete backside film deposition process on a semiconductor wafer; perform at least an additional characterization process following the at least one discrete backside film deposition process; determine at least one of a film force or one or more in-plane displacements for at least one discrete backside film deposited on the semiconductor wafer via the at least one discrete backside film deposition process based on the at least the first characterization process and the at least the additional characterization process; and provide at least one of the film force or the one or more in-plane displacements to at least one process tool via at least one of a feed forward loop or a feedback loop to improve performance of one or more fabrication processes.