Provided is an electronic device which can easily measure a standby current of an internal circuit of an electronic device after burn-in. The electronic device includes: a power source terminal; a regulator that generates a predetermined voltage from a voltage of the power source terminal; an internal circuit that is operated by an output voltage of the regulator; and a standby terminal through which the regulator and the internal circuit are set to a low power consumption state.

Systems and methods as described herein may take a variety of forms. In one example, systems and methods are provided for a circuit for powering a voltage regulator. A voltage regulator circuit has an output electrically coupled to a gate of an output driver transistor, the output driver transistor having a first terminal electrically coupled to a voltage source and a second terminal electrically coupled to a first terminal of a voltage divider, the voltage divider having an second terminal electrically coupled to ground, and the voltage divider having an output of a stepped down voltage. A power control circuitry transistor has a first terminal electrically coupled to the voltage source, the power control circuitry transistor having a second terminal electrically coupled to the gate terminal of the output driver transistor, and the power control circuitry transistor having a gate terminal electrically coupled to a status voltage signal.

Techniques for generating a control voltage for a pass transistor of a linear regulator to avoid in-rush current during a start-up phase. In an aspect, a digital comparator is provided to generate a digital output voltage comparing a function of the regulated output voltage with a reference voltage, e.g., a ramp voltage. The digital output voltage is provided to control a plurality of switches selectively coupling the gate of the pass transistor to one of a plurality of discrete voltage levels, e.g., a bias voltage or a ground voltage to turn the pass transistor on or off. In another aspect, the digital techniques may be selectively enabled during a start-up phase of the regulator, and disabled during a normal operation phase of the regulator.

An internal voltage generation circuit includes a first control signal generation unit suitable for generating a first control signal activated to a level of a second external voltage when a first external voltage is activated, a second control signal generation unit suitable for generating a second control signal that equals the higher of the second external voltage and an internal voltage, and a voltage generation unit suitable for generating the internal voltage by performing a charge pumping operation based on the second external voltage and an oscillation signal while blocking a current flowing through a generation node from which the internal voltage is generated, based on the first and second control signals.

A voltage generation circuit may include: a first transistor coupled to an internal supply voltage terminal, and configured as a diode-connected transistor; a second transistor coupled to the first transistor and configured as a diode-connected transistor; and a third transistor coupled between the second transistor and a ground voltage terminal, and configured to operate according to a first reference voltage generated based on an external supply voltage. The voltage generation circuit may limit a variation in level of a second reference voltage which is generated through a drain terminal of the second transistor as a threshold voltage of the second transistor rises according to a rise in level of the internal supply voltage.

A multi-deck circuit arrangement including a first deck circuit having a negative supply terminal and a second deck having a positive supply terminal connected to the negative supply terminal. A single power supply provides a voltage across both the first and second decks. The total power consumption will be less than the prior art of having both deck circuits conventionally regulated. The supply rail connecting the second deck's positive supply terminal to the first deck's negative supply terminal may be regulated. In one embodiment, the rail voltage can be controlled to optimize deck circuit operation for speed and power and to avoid level shifters when interfacing to other circuits.

Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output. In another example, a monolithic Pstage package may be provided with an adaptive application-oriented interface and a multi-function pin that allows the same monolithic Pstage package to automatically detect and select between a relatively higher power information handling system application, and a relatively lower power information handling system VR application.

When powering-up or exiting from a sleep mode, the ramping up of various supply voltage nodes may occur at different rates. Thus, in a dual-rail memory circuit, a first voltage rail may be at voltage before a second voltage rail. Such a transient state of operation may lead to current spikes that unnecessarily draw power and introduce undesired inefficiency. An internal sleep signal generation circuit in the dual-rail memory circuit precisely controls an internal sleep signal such that the transition from off or sleep mode to operating mode is set to assure that the supply voltage nodes are close enough to the at-voltage operating level before releasing the sleep mode.

A circuit may include a first voltage regulator to supply a main circuit and a second voltage regulator to supply a test circuit. The test circuit may produce a test signal having a characteristic dependent on the second regulated supply voltage. A controller may adjust second voltage regulator to a threshold level to induce a change in the characteristic of the test signal. The controller may adjust the first voltage regulator based on the threshold level of the second regulated supply voltage.

An apparatus is described. The apparatus includes a power management integrated circuit (PMIC) to generate a supply voltage for a memory module. The PMIC is to perform a measurement during bring-up of the memory module of a worst case current draw of the memory module and/or corresponding droop in the supply voltage. The PMIC is to apply a step-up to the supply voltage in accordance with the measurement in response to detection by the PMIC of a surge in the memory module's current draw during operation of the memory module.