A family of bandgap embodiments are disclosed herein, capable of operating with very low currents and low power supply voltages, using neither any custom devices nor any special manufacturing technology, and fabricated on mainstream standard digital CMOS processes. As such, manufacturing cost can be kept low, manufacturing yields of digital CMOS system-on-a-chip (SOC) that require a reference can be kept optimal, and manufacturing risk can be minimized due to its flexibility with respect to fabrication process node-portability. Although the embodiments disclosed herein use novel techniques to achieve accurate operations with low power and low voltage, this family of bandgaps also uses parasitic bipolar junction transistors (BJT) available in low cost digital CMOS process to generate proportional and complementary to absolute temperature (PTAT and CTAT) voltages via the base-emitter voltage (V.sub.EB) of BJTs and scaling V.sub.EB differential pairs to generate the BJTs thermal voltage (V.sub.T).

A curvature-corrected bandgap reference comprising a first BJT device operating at a first current density that is substantially proportional to absolute temperature, the first BJT device having a first base-emitter voltage and a first base terminal and a second BJT device operating at a second current density that is substantially independent of temperature, the second BJT device having a second base-emitter voltage and a second base terminal. The first and second base terminals operate at a reference voltage. The reference voltage comprises a linear combination of the first and second base-emitter voltages and is thereby made substantially independent of temperature and curvature-corrected. The linear combination is provided by summing the first base-emitter voltage, a proportional to absolute temperature (PTAT) voltage proportional to a first current density, and a curvature-correction voltage proportional to a difference between the first and second base-emitter voltages.

The present invention provides a voltage output device, which comprises a direct-current power supply, a reference level input terminal, a predetermined level output terminal, a voltage regulation module and a control signal generation module, the control signal generation module comprises a control signal generation unit, the voltage regulation module comprises a plurality of storage capacitors, wherein the control signal generation unit can send a charging control signal to the voltage regulation module in a charging stage of the voltage output device, and send an operation control signal to the voltage regulation module in an operating stage of the voltage output device. The present invention further provides a gate driving circuit and a display apparatus. With the voltage output device provided by the present invention, a high-level voltage that is high enough and/or a low-level voltage that is low enough can be outputted, thereby satisfying specific application requirements.

The present invention provides a voltage output device, which comprises a direct-current power supply, a reference level input terminal, a predetermined level output terminal, a voltage regulation module and a control signal generation module, the control signal generation module comprises a control signal generation unit, the voltage regulation module comprises a plurality of storage capacitors, wherein the control signal generation unit can send a charging control signal to the voltage regulation module in a charging stage of the voltage output device, and send an operation control signal to the voltage regulation module in an operating stage of the voltage output device. The present invention further provides a gate driving circuit and a display apparatus. With the voltage output device provided by the present invention, a high-level voltage that is high enough and/or a low-level voltage that is low enough can be outputted, thereby satisfying specific application requirements.

A driver for a power field-effect transistor includes a first and second circuits that apply respective charge currents to a gate of the power field-effect transistor when a control signal has a first logic value and the voltage between the gate and the source is smaller than a first threshold voltage and greater than a second threshold voltage. Third and fourth circuits apply respective discharge currents to the gate when the control signal has a second logic value and the voltage between the gate and the source is greater than a third threshold voltage and smaller than a fourth threshold voltage. The driver may include at least one field-effect transistor configured to generate at least one of the first, second, third or fourth threshold voltage.

A driver for a power field-effect transistor includes a first and second circuits that apply respective charge currents to a gate of the power field-effect transistor when a control signal has a first logic value and the voltage between the gate and the source is smaller than a first threshold voltage and greater than a second threshold voltage. Third and fourth circuits apply respective discharge currents to the gate when the control signal has a second logic value and the voltage between the gate and the source is greater than a third threshold voltage and smaller than a fourth threshold voltage. The driver may include at least one field-effect transistor configured to generate at least one of the first, second, third or fourth threshold voltage.

A reference circuit arrangement comprises a branched current path connecting a first and second terminal via an intermediate terminal. The intermediate terminal is connected to a reference terminal. A current path is coupled between the first and second terminal via the reference terminal. A feedback loop is connected to the first and second terminal and designed to control, at the first and second terminal, a virtual ground potential. A reference path is connected to the feedback loop having a reference input for receiving from the feedback loop a reference current and reference output to provide a reference voltage.

A reference circuit arrangement comprises a branched current path connecting a first and second terminal via an intermediate terminal. The intermediate terminal is connected to a reference terminal. A current path is coupled between the first and second terminal via the reference terminal. A feedback loop is connected to the first and second terminal and designed to control, at the first and second terminal, a virtual ground potential. A reference path is connected to the feedback loop having a reference input for receiving from the feedback loop a reference current and reference output to provide a reference voltage.

To provide a reference voltage circuit capable of outputting a reference voltage excellent in temperature characteristic. A reference voltage circuit includes a first constant current circuit, a first transistor of a first conductivity type which has a source connected to the first constant current circuit and is operated as a first stage source follower, a second constant current circuit, and a second transistor of a second conductivity type which has a gate connected to the source of the first transistor and a source connected to the second constant current circuit and is operated as a second stage source follower. The reference voltage circuit is configured to output a reference voltage from the source of the second transistor.

To provide a reference voltage circuit capable of outputting a reference voltage excellent in temperature characteristic. A reference voltage circuit includes a first constant current circuit, a first transistor of a first conductivity type which has a source connected to the first constant current circuit and is operated as a first stage source follower, a second constant current circuit, and a second transistor of a second conductivity type which has a gate connected to the source of the first transistor and a source connected to the second constant current circuit and is operated as a second stage source follower. The reference voltage circuit is configured to output a reference voltage from the source of the second transistor.