A computing device includes a thermal excursion detection unit and a power supply unit. The thermal excursion detection unit is configured to monitor a temperature of an internal volume of the computing device and to control the operation of the power supply unit. The power supply unit is configured to provide power to hardware components in the computing device and the power supply unit only provides power to the hardware components when the thermal excursion detection unit permits.

Example implementations relate to an access point (AP) that can via up from power save mode via a including Bluetooth low energy (BLE) system-on-chip (SoC) within the AP. The AP can include a power source, a power reset logic component in communication with the power source, a BLE SoC, a processor, and a non-transitory memory resource instructions executable by the processor that signals the AP is in a power save mode, receives an indication, via the BLE SoC, to wake up the AP, and wake up, via the BLE SoC, the AP in response to receiving the indication.

Example implementations relate to an access point (AP) that can via up from power save mode via a including Bluetooth low energy (BLE) system-on-chip (SoC) within the AP. The AP can include a power source, a power reset logic component in communication with the power source, a BLE SoC, a processor, and a non-transitory memory resource instructions executable by the processor that signals the AP is in a power save mode, receives an indication, via the BLE SoC, to wake up the AP, and wake up, via the BLE SoC, the AP in response to receiving the indication.

Provided is an apparatus and method for a digital power supply that can provide independent power control for two or more electrical loads. Some disclosed embodiments provide continuous, variable power and other disclosed embodiments provide discrete power levels. Disclosed embodiments may reduce the magnitude of harmonic currents and/or flicker introduced into a power system. Embodiments include a microprocessor that delivers power to electric loads using phase-controlled AC current. In some embodiments, the microprocessor may calculate a power array corresponding to a requested power for each electric load. Logic is provided for populating the power array in a pattern that reduces the magnitude of harmonic currents and flicker. Portions of the disclosure include a band controller for delivering power to achieve and maintain a desired target temperature, and a wireless controller for controlling temperature from a remote device.

Provided is an apparatus and method for a digital power supply that can provide independent power control for two or more electrical loads. Some disclosed embodiments provide continuous, variable power and other disclosed embodiments provide discrete power levels. Disclosed embodiments may reduce the magnitude of harmonic currents and/or flicker introduced into a power system. Embodiments include a microprocessor that delivers power to electric loads using phase-controlled AC current. In some embodiments, the microprocessor may calculate a power array corresponding to a requested power for each electric load. Logic is provided for populating the power array in a pattern that reduces the magnitude of harmonic currents and flicker. Portions of the disclosure include a band controller for delivering power to achieve and maintain a desired target temperature, and a wireless controller for controlling temperature from a remote device.

Systems and methods are disclosed, including rebuilding a logical-to-physical (L2P) data structure of a storage system subsequent to relocating assigned marginal group of memory cells of a memory array of the storage system, such as when resuming operation from a low-power state, including an asynchronous power loss (APL).

Systems and methods are disclosed, including rebuilding a logical-to-physical (L2P) data structure of a storage system subsequent to relocating assigned marginal group of memory cells of a memory array of the storage system, such as when resuming operation from a low-power state, including an asynchronous power loss (APL).

An ultrasound imaging system includes a processor that is programmed to operate the system in a normal operating state and two or more lesser power states. The processor lowers the operating power state to a lesser power state upon detecting one or more operating conditions such as no tissue been imaged in a predetermined time limit or that the imaging system or transducer has not been moved in a time limit. Upon awakening from a power off state, the processor implements a lesser power state before operating at the normal operating state to avoid undue power use until the transducer is positioned to image tissue.

A performance management scheme for a processor based on leakage current measurement in field. The scheme performs the operations of detection and correction. The operation of detection measures per core leakage current in the field (e.g., using voltage regulator electrical current counters). The operation of correction changes the processor power management behavior. For example, processor cores showing high leakage degradation may be logically swapped with cores showing low leakage degradation.

A system includes a power profile engine, a power measurement engine, and a power throttling signal generator. The power profile engine receives a desired power profile, e.g., a first profile current average associated with a first time duration and a second profile current average associated with a second time duration. The power measurement engine measures current being drawn and generates a first running average for the measured currents for the first time duration and generates a second running average for the measured currents for the second time duration. The power throttling signal generator generates a first power throttling signal to throttle power in response to the first running average for the measured currents being greater than the first profile current average and generates a second power throttling signal to throttle power in response to the second running average for the measured currents being greater than the second profile current average.