Devices and techniques are disclosed herein for more efficiently exchanging large amounts of data between a host and a storage system. In an example, a large read operation can include receiving a pre-fetch command, a parameter list and a read command at a storage system. In certain examples, the pre-fetch command can provide an indication of the length of the parameter list, and the parameter list can provide location identifiers of the storage system from which the read command can sense the read data.

Provided are an apparatus, system and method for offloading data transfer operations between source and destination storage devices to a hardware accelerator. The hardware accelerator includes a memory space and control logic to receive, from a host processor, a command descriptor indicating at least one source storage device having transfer data to transfer to at least one destination storage device and a computational task to perform on the transfer data. The control logic sends read commands to the at least one source storage device to read the transfer data to at least one read buffer in the memory space and performs the computational task on the transfer data to produce modified transfer data. The control logic writes the modified transfer data to at least one write buffer in the memory space to cause the modified transfer data to be written to the at least one destination storage device.

Described herein is a system, and related techniques, for predicting I/O requests that are not necessarily directed to sequential sectors of a physical storage device. In some embodiments, I/O patterns that do not involve sequential-sector access, and that may be relatively long-term patterns, may be recognized. To recognize such patterns, deep machine-learning techniques may be used, for example, using neural networks. Such neural networks may be a recurrent neural network such as, for example, an LSTM-RNN. I/O streams for a workstream may be sampled for specific I/O features to produce a time series of I/O feature values of a workstream, and this time series of data may be fed to a prediction engine, e.g., an LSTM-RNN to predict one or more future I/O features values, and I/O actions may be taken based on these predicted feature values.

An illustrative embodiment disclosed herein is an apparatus including a processor having programmed instructions to map a plurality of objects to a region and map the region to a plurality of vdisks. The plurality of objects are stored in the plurality of vdisks. The processor has programmed instructions to, responsive to mapping the plurality of objects to the region, identify a policy associated with the region. The policy specifies a policy action in response to satisfying a predetermined condition. The processor has programmed instructions to, responsive to satisfying the predetermined condition, access the plurality of vdisks and perform the policy action on the plurality of objects.

Embodiments of the present disclosure a method, device and computer program product for storage management. The method comprises: determining, from a storage system, a plurality of storage areas corresponding to a plurality of files; selecting, from the plurality of storage areas, a pair of first storage area and second storage area, both the first storage area and the second storage area having non-empty available space; moving at least part of data stored in used space of the first storage area to available space of the second storage area; and in response to determining that the used space of the first storage area becomes empty after the moving, releasing the first storage area. In this way, the storage space can be effectively released and the storage efficiency is accordingly improved.

An example non-transitory computer-readable storage medium comprising instructions that when executed cause a processor of a computing device to: in response to receiving a chunk size request from a recovery agent executable at an operating system of the computing device, determine a chunk size via firmware instructions of the computing device; transmit the chunk size from the firmware instructions to the recovery agent; receive data chunks of a recovery image from the recovery agent in sequence; store the data chunks in a storage device of the computing device; and construct the recovery image using the data chunks.

An integrated circuit (IC) memory device encapsulated within an IC package. The memory device includes first memory regions configured to store lists of operands; a second memory region configured to store a list of results generated from the lists of operands; and at least one third memory region. A communication interface of the memory device can receive requests from an external processing device; and an arithmetic compute element matrix can access memory regions of the memory device in parallel. When the arithmetic compute element matrix is processing the lists of operands in the first memory regions and generating the list of results in the second memory region, the external processing device can simultaneously access the third memory region through the communication interface to load data into the third memory region, or retrieve results that have been previously generated by the arithmetic compute element matrix.

Embodiments of methods and apparatuses for defending against speculative side-channel analysis on a computer system are disclosed. In an embodiment, a processor includes a decoder, a cache, address translation circuitry, a cache controller, and a memory controller. The decoder is to decode an instruction. The instruction is to specify a first address associated with a data object, the first address having a first memory tag. The address translation circuitry is to translate the first address to a second address, the second address to identify a memory location of the data object. The comparator is to compare the first memory tag and a second memory tag associated with the second address. The cache controller is to detect a cache miss associated with the memory location. The memory controller is to, in response to the comparator detecting a match between the first memory tag and the second memory tag and the cache controller detecting the cache miss, load the data object from the memory location into the cache. Other embodiments include encryption of memory tags together with addresses.

A host is configured to communicate with a storage controller over a first storage area network. A request is transmitted from the host to the storage controller to provide read diagnostic parameters of a second storage area network that is used to mirror data controlled by the storage controller to another storage controller. The host receives the read diagnostic parameters of the second storage area network from the storage controller.

A technique involves: in response to receiving a first request for adjusting a first width of a disk array to a second width, obtaining, based on source identification information of a source stripe group in the disk array in the first request, source block identification information of a source block associated with the source stripe group. The technique further involves: determining destination identification information of a destination stripe group associated with the second width for storing data. The technique further involves: storing, based on the source identification information and the destination identification information, source data and metadata for the source data from the source block into a destination block of the destination stripe group, the metadata including node identification information for accessing nodes of the source block. The technique further involves: adjusting the node to access the destination block based on the node identification information.