G06F3/0646

Method and system for efficient content transfer to distributed stores

A method is performed by a computer system. The method includes receiving the source object; providing an upload queue; executing a chunk creation loop to create a first plurality of chunks and add the first plurality of chunks to the upload queue, each chunk in the first plurality of chunks containing a respective portion of the source object; implementing an upload thread pool of upload threads; and executing the upload threads to upload the source object to a distributed data store, including executing the upload threads to upload chunks from the first plurality of chunks to the distributed data store in parallel.

DATA DISPERSION-BASED MEMORY MANAGEMENT

A method includes determining a respective number of and respective locations of valid data portions of a plurality of blocks of NAND memory cells, based on the respective locations of the valid data portions, determining respective dispersions of the valid data portions within the plurality of blocks of NAND memory cells, based at least on the respective dispersions, selecting a block of NAND memory cells from the plurality of blocks of NAND memory cells, and performing a folding operation on the selected block.

Electronic device and control method for controlling memory

An electronic device and a control method for controlling a memory are provided. An electronic device according to various embodiments of the present disclosure may comprise: a housing; a communication circuit; at least one processor operatively connected to the communication circuit; a non-volatile memory operatively connected to the processor and configured to store at least one file; and a volatile memory operatively connected to the processor, wherein the non-volatile memory stores instructions configured, when executed, to cause the processor to establish a first area and a second area on the volatile memory; store only first type data associated with the at least one file in the first area; store the first type data and/or store at least one second type data that is not associated with the at least one file, in the second area; receive a request for storing one of the at least one second type data, which exceeds a selected threshold value; and when the request is received, cause the first area to be in a state for storing the one of the at least one second type data, instead of the first type data.

Method for management of multi-core solid state drive

A method of operating a multi-core solid state drive includes: receiving an initial internal back copy command including a physical copy referencing a source Logical Page Number (LPN) and a destination LPN from a host, delaying processing of the physical copy when the physical copy requires two different flash translation layers (FTLs), and generating a modified batch internal copy command by replacing the source LPN of the physical copy with a Physical Page Number mapped to the source LPN.

Intra-device notational data movement system

An intra-device notational data movement system has a chassis including processing system(s) that are configured to provide a first thread and a second thread. A data mover subsystem in the chassis is coupled to the processing system(s). In a communication transmitted by the first thread, the data mover subsystem identifies a request to transfer data to the second thread that is stored in a first portion of a memory system that is associated with the first thread in a memory fabric management database. The data mover subsystem then modifies notational reference information in the memory fabric management database to disassociate the first portion of the memory system and the first thread and associate the first portion of the memory system with the second thread, which allows the second thread to reference the data using request/respond operations.

Parallel memory access and computation in memory devices
11157213 · 2021-10-26 · ·

An integrated circuit (IC) memory device encapsulated within an IC package. The memory device includes first memory regions configured to store lists of operands; a second memory region configured to store a list of results generated from the lists of operands; and at least one third memory region. A communication interface of the memory device can receive requests from an external processing device; and an arithmetic compute element matrix can access memory regions of the memory device in parallel. When the arithmetic compute element matrix is processing the lists of operands in the first memory regions and generating the list of results in the second memory region, the external processing device can simultaneously access the third memory region through the communication interface to load data into the third memory region, or retrieve results that have been previously generated by the arithmetic compute element matrix.

Data redirection upon failure of a program operation
11158396 · 2021-10-26 · ·

A determination is made by a processing device included in a memory component that an operation to program data to a location in the memory component has failed, the data is programmed to a different location in the memory component by the processing device upon determining the operation has failed, and a notification that the data has been programmed to the different location in the memory component is provided by the processing device to a processing device operatively coupled to the memory component.

Delayed replication for protection of replicated databases
11153335 · 2021-10-19 · ·

Apparatuses and methods are disclosed for protection of data servers configured for data replication of a database. As an example, one apparatus includes at least one processing circuit configured to receive records indicating respective modifications performed on a first version of the database stored in a first data server of the plurality of data servers. The at least one processing circuit is configured to delay replication of the modification in one or more additional servers in the plurality of data servers for a respective length of time specified for the servers in a security profile. While delaying replication of the modification, the processing circuit determines a probability that the modification is malicious based on a first set of factors indicated in a security profile. If the probability is greater than a threshold specified in the security profile, the processing circuit prevents the modification from being performed.

Storage system and storage management method

Provided is a storage system and a storage management method, aiming at reducing data movement amount necessary for using an expanded capacity in a distributed RAID. When only A (A is a positive integer) physical storage drives are added, a storage controller selects virtual parcels that are mapped to different physical storage drives among N physical storage drives and are included in different virtual chunks, changes an arrangement of the selected virtual parcels to the added A physical storage drives, and constitutes a new chunk based on unallocated virtual parcels selected from different physical storage drives among the (N+A) physical storage drives.

DATA PROCESSING SYSTEM
20210318819 · 2021-10-14 ·

A data processing system includes a plurality of processors, a memory, a non-volatile memory, and a memory controller. The operational memory includes a first memory region and a second memory region. The memory controller performs a first swap operation of releasing assignment of a memory area assigned to a first processor within the first memory region, the first swap operation performed by moving data from the memory area to the second memory region. The memory controller performs a second swap operation by moving the data from the second memory region to the non-volatile memory when a second swap condition is satisfied after completion of the first swap operation.