Methods, systems, and devices related to a memory system or scheme that includes a first memory device configured for low-energy access operations and a second memory device configured for storing high-density information and operations of the same are described. The memory system may include an array configured for high-density information and may interface with a host via a controller and a cache or another array of a relatively fast memory type. The memory system may support signals communicated according to one or several modulation schemes, including a modulation scheme or schemes that employ two, three, or more voltage levels (e.g., NRZ, PAM4). The memory system may include, e.g., separate channels configured to communicate using different modulation schemes between a host and between memory arrays or memory types within the memory system.

A method includes determining a respective number of and respective locations of valid data portions of a plurality of blocks of NAND memory cells, based on the respective locations of the valid data portions, determining respective dispersions of the valid data portions within the plurality of blocks of NAND memory cells, based at least on the respective dispersions, selecting a block of NAND memory cells from the plurality of blocks of NAND memory cells, and performing a folding operation on the selected block.

Fragmented data on a storage device may be additionally stored in a cache. A cache weight for determining storage of a data unit can be determined. For example, a computing device can receive storage device characteristics from a storage device. A data unit comprising multiple fragments may be stored on the storage device. The computing device can receive data unit characteristics from the storage device. The computing device can determine a cache weight for the data unit. The computing device may output the cache weight for determining storage of the data unit in a cache.

An electronic control unit includes a volatile memory, a nonvolatile memory that includes a storage area including a data portion to which data loaded into the volatile memory is written and a margin portion which is an unused portion corresponding to the data, and a control unit configured to load the data of the nonvolatile memory into the volatile memory. The nonvolatile memory stores valid portion information which is information indicating the data portion. The control unit is configured to load the data of the nonvolatile memory into a storage area of the volatile memory based on the valid portion information.

In an embodiment, before modifying a persistent ORL (ORL), a database management system (DBMS) persists redo for a transaction and acknowledges that the transaction is committed. Later, the redo is appended onto the ORL. The DBMS stores first redo for a first transaction into a first PRB and second redo for a second transaction into a second PRB. Later, both redo are appended onto an ORL. The DBMS stores redo of first transactions in volatile SRBs (SLBs) respectively of database sessions. That redo is stored in a volatile shared buffer that is shared by the database sessions. Redo of second transactions is stored in the volatile shared buffer, but not in the SLBs. During re-silvering and recovery, the DBMS retrieves redo from fast persistent storage and then appends the redo onto an ORL in slow persistent storage. After re-silvering, during recovery, the redo from the ORL is applied to a persistent database block.

A system may include a memory and a processor in communication with the memory configured to perform operations. The may operations include obtaining transaction logs in blocks from nodes of a data storage system. The operations may include, for each transaction log, splitting the transaction log into log entries, grouping log entries into groups associated with a same data source, and writing the log entries of the groups to empty blocks such that log entries from different groups do not share a same block. The operations may include identifying a same sequence of log entries from the written transaction logs and uploading first blocks of a first transaction log, including the same sequence of log entries, to an object-based storage without uploading second blocks of a second transaction log including the same sequence of log entries to the object-based storage.

The present disclosure includes apparatuses and methods to transfer data between banks of memory cells. An example includes a plurality of banks of memory cells and a controller coupled to the plurality of subarrays configured to cause transfer of data between the plurality of banks of memory cells via internal data path operations.

A data storage system may include a first storage pool and a second storage pool, with the second storage pool comprising larger, slower storage drives. The data storage system may associate, with a first data, a first parameter corresponding to an access frequency for short term reads, a second parameter corresponding to access frequency for long term reads, a third parameter corresponding to an access frequency for short term writes, and a fourth parameter corresponding to an access frequency for long term writes. The data storage system may then determine whether to store the first data on the first storage pool or the second storage pool based on at least one of the first parameter, the second parameter, the third parameter, and the fourth parameter.

First elements of a dense vector to be multiplied with first elements of a first row of a sparse array may be determined. The determined first elements of the dense vector may be written into a memory. A dot product for the first elements of the sparse array and the first elements of the dense vector may be calculated in a plurality of increments by multiplying a subset of the first elements of the sparse array and a corresponding subset of the first elements of the dense vector. A sequence number may be updated after each increment is completed to identify a column number and/or a row number of the sparse array for which the dot product calculations have been completed.

A computer-implemented method, according to one embodiment, is for performing internal striping within a subset of slices. The computer-implemented method includes: receiving, by a computer, a logical unit; splitting, by the computer, the logical unit into a plurality of data chunks; and distributing, by the computer, the plurality of data chunks across the subset of slices such that the plurality of data chunks are striped across the subset of slices, and striped across a plurality of physical partitions in each of the subset of slices. Moreover, each of the subset of slices correspond to a different physical storage module in a single storage device. Other systems, methods, and computer program products are described in additional embodiments.