Patent classifications
G06F3/0662
Programmable configuration of zones, write stripes or isolated regions supported from subset of nonvolatile/persistent memory
This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.
Nonvolatile/persistent memory with zone mapped to selective number of physical structures and deterministic addressing
This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.
Nonvolatile memory controller supporting variable configurability and forward compatibility
This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.
Nonvolatile memory controller enabling independent garbage collection to independent zones or isolated regions
This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.
Virtual controller memory buffer
Method and apparatus for managing data transfers. In some embodiments, first and second storage devices respectively include first and second controllers, first and second local memories, and first and second non-volatile memories (NVMs). A virtual controller memory buffer (CMB) is formed from a dedicated portion of each of the first and second local memories for control by a host device. The first controller receives a virtual command set from the host device, and extracts a first local command to transfer data between the host device and the first NVM. In some cases, the second controller also receives the virtual command set and concurrently extracts a different, second local command to transfer data between the host device and the second NVM. Alternatively, the first controller may extract and forward the second local command to the second controller. The first and second NVMs may form an NVMe (Non-Volatile Memory Express) namespace.
Generation of a packaged version of an IO request
Examples may forward an input/output (IO) request with use of kernel-level instructions. Examples may receive the IO request via a port of a standby controller, generate an alternate version of the IO request using at least kernel-level instructions of the standby controller, and provide the alternate version of the IO request to physical memory of the active controller by providing the alternate version of the IO request to a designated region of physical memory of the standby controller that is mapped to a designated region of the physical memory of the active controller.
Non-disruptive upgrades to a cloud-based storage system
Performing non-disruptive upgrades to a cloud-based storage system may include receiving a request to update one or more components of the cloud-based storage system, the request comprising an identification of an updated codified state of the cloud-based storage system; determining, based on the updated codified state and a current state of the cloud-based storage system, one or more transitional codified states; and updating the one or more components by applying the one or more transitional codified states.
ENRICHING A STORAGE PROVIDER WITH CONTAINER ORCHESTRATOR METADATA IN A VIRTUALIZED COMPUTING SYSTEM
An example method of enriching a storage provider of a virtualized computing system with metadata managed by a container orchestrator executing in the virtualized computing system is described. The method includes detecting, by a metadata sync service executing as an extension of the container orchestrator, metadata that is included in a persistent volume-based (PV-based) object managed by the container orchestrator, the PV-based object referencing a persistent volume; and pushing, by the metadata sync service, the metadata to the storage provider to augment a storage volume object managed by the storage provider, the storage volume object referencing a storage volume backing the persistent volume.
Tiering Data Strategy for a Distributed Storage System
A plurality of computing devices are communicatively coupled to each other via a network, and each of the plurality of computing devices is operably coupled to one or more of a plurality of storage devices. The storage devices may be assigned to one of a plurality of memory tiers, and the data in a storage device may be reassigned to another storage device in a different memory tier.
AUTOMATED RESOURCE SELECTION FOR SOFTWARE-DEFINED STORAGE DEPLOYMENT
Methods, apparatus, and processor-readable storage media for automated resource selection for software-defined storage deployment are provided herein. An example computer-implemented method includes obtaining a software-defined storage deployment request from a user, the request comprising an amount of total storage capacity and a minimum number of servers; generating an in-memory data structure of at least a portion of an inventory associated with the user, wherein the inventory comprises servers and disks associated with the servers, and wherein the data structure organizes the inventory based on disk size and disk count per server; calculating, using at least the data structure, total storage capacity for each of multiple combinations of disk sizes and disk counts across the servers; determining at least one of the combinations, based on the total storage calculations, that satisfies the request; and performing at least one automated action based on the combination(s) determined to satisfy the request.