An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data as first streaming data of a first data type comprising a first data movement type and first data format type. The apparatus may also include at least one accelerator coupled to the streaming I/O controller to receive the first streaming data, transform the first streaming data to second streaming data having a second data type different than the first data type, and output the second streaming data. In addition, the apparatus may include a streaming interconnect to conduct the second data to a peer device configured to receive data of the second data type.

This application discloses a data flow control method and apparatus. The method includes: calculating, by a device when a clock signal arrives, a quantity of transition-minimized differential signaling (TMDS) characters currently stored in a buffer of the device; and outputting, by the device, the TMDS character in the buffer when the quantity of TMDS characters currently stored in the buffer reaches a preset value, or outputting a gap data packet when the quantity of TMDS characters currently stored in the buffer does not reach a preset value, where the preset value is less than or equal to a TMDS character storage capacity of the buffer.

This application discloses a data flow control method and apparatus. The method includes: calculating, by a device when a clock signal arrives, a quantity of transition-minimized differential signaling (TMDS) characters currently stored in a buffer of the device; and outputting, by the device, the TMDS character in the buffer when the quantity of TMDS characters currently stored in the buffer reaches a preset value, or outputting a gap data packet when the quantity of TMDS characters currently stored in the buffer does not reach a preset value, where the preset value is less than or equal to a TMDS character storage capacity of the buffer.

A system, method and computer readable medium for operating a First In, First Out (FIFO) buffer that transfers data between a host and a plurality of endpoints using chip select is disclosed. The method includes receiving a current value of a read pointer and a status for an active endpoint and reading data at a location to which the read pointer points and setting a tag associated with the location to which the read pointer points to indicate availability.

A system, method and computer readable medium for operating a First In, First Out (FIFO) buffer that transfers data between a host and a plurality of endpoints using chip select is disclosed. The method includes receiving a current value of a read pointer and a status for an active endpoint and reading data at a location to which the read pointer points and setting a tag associated with the location to which the read pointer points to indicate availability.

A processor includes a plurality of processing cores; a frequency divider; and a synchronous first in first out (FIFO) buffer. The frequency divider frequency divides a first clock signal that is associated with a first clock domain to provide a second clock signal that is associated with a second clock domain. The synchronous FIFO buffer has a write port that is associated with the first clock domain and a read port that is associated with the second clock domain. The synchronous FIFO communicates the data between the first and second clock domains.

A processor includes a plurality of processing cores; a frequency divider; and a synchronous first in first out (FIFO) buffer. The frequency divider frequency divides a first clock signal that is associated with a first clock domain to provide a second clock signal that is associated with a second clock domain. The synchronous FIFO buffer has a write port that is associated with the first clock domain and a read port that is associated with the second clock domain. The synchronous FIFO communicates the data between the first and second clock domains.

A wireless control device includes a power source, one or more sensors, one or more switches, a wireless transceiver circuit, an antenna connected to the wireless transceiver circuit, and a processor communicably coupled to the power source, the one or more sensors, the one or more switches, and the wireless transceiver circuit. The processor receives a data from the one or more sensors or the one or more switches, determines a pre-defined action associated with the data that identifies one or more external devices and one or more tasks, and transmits one or more control signals via the wireless transceiver circuit and the antenna that instruct the identified external device(s) to perform the identified task(s).

A system, method and computer readable medium for operating a First In, First Out (FIFO) buffer that transfers data between a host and a plurality of endpoints using chip select is disclosed. The method includes receiving a current value of a read pointer and a status for an active endpoint and reading data at a location to which the read pointer points and setting a tag associated with the location to which the read pointer points to indicate availability.

A system, method and computer readable medium for operating a First In, First Out (FIFO) buffer that transfers data between a host and a plurality of endpoints using chip select is disclosed. The method includes receiving a current value of a read pointer and a status for an active endpoint and reading data at a location to which the read pointer points and setting a tag associated with the location to which the read pointer points to indicate availability.