The disclosure provides a restart control device and a restart control method. The restart control device is disposed in an electronic device. The electronic device includes a keyboard and a restart button. At least one assigned key of a plurality of keys of the keyboard is set. The restart control device determines whether the at least one assigned key is pressed, and determines whether the restart button is pressed. When determining that the restart button is pressed and the at least one assigned key is pressed, the restart control device provides a restart control signal to cause the electronic device to perform a restart operation. The disclosure can prevent an unnecessary restart operation due to a single restart button being mistyped.

In general, embodiments disclosed herein relate to using high bandwidth memory (HBM) in a booting process. In embodiments disclosed herein, a region of the HBM is set aside as an additional memory pool (also referred to as a pool) for drivers and/or other memory heap requests in the booting process. One or more embodiments maintain the existing memory pool below four GB, but provide an additional resource for drivers and heap requests.

An apparatus includes a boot-up control circuit configured to, when a first boot-up operation is performed, latch first fuse data by receiving the first fuse data and fuse information from a fuse circuit and configured to, when a second boot-up operation is performed, latch second fuse data by receiving the second fuse data from the fuse circuit based on the fuse information; and a rupture control circuit configured to store a failure address as the second fuse data by rupturing the fuse circuit based on the fuse information.

Facilitation of transfer of pre-operating system (pre-OS) data to a persistent store is enabled relative to an operation performed external to the OS. A system can comprise a processor, and a memory that stores computer executable instructions that, when executed by the processor, can facilitate performance of operations. The operations can comprise writing data relative to a pre-OS environment to a partition external to an operating system (OS) partition, and, in response to a reboot operation, booting an OS and transferring the data or a copy of the data to the OS partition. Alternatively, the operations can comprise, writing data relative to an updating operation to a log accessible by an OS of the system, assigning a variable value to the log, automatically searching, while operating the OS, for the variable value, and copying or transferring the data relative to the OS via identifying the variable value upon the identification.

The present disclosure relates to a method for booting a processing device, the method including: generating, by a monotonic counter and during a first boot phase, a first count value; transmitting, by the monotonic counter, the first count value to an access control circuit of a memory; reading, on the basis of the first count value, first data stored in the memory; and generating, by the monotonic counter and during a second boot phase, a second count value greater than the first count value. The access control circuit of the memory is configured so that the reading of the first data is not authorized on the basis of the second count value.

Provided herein may be a storage device including a memory device, and a memory controller including a plurality of cores. The memory controller may load a boot loader image for firmware update running in a memory of a core arbitrarily selected from among the plurality of cores, receive a new firmware image from a host in response to the boot loader image that is executed in the selected core, and update a firmware image stored in a memory of each of the plurality of cores with the new firmware image.

A device interoperability system for one or more user devices associated with a user, wherein said one or more user devices comprises a first user device, said device interoperability system comprising a communications module, wherein a first connection is established between said first user device and said communications module; storage associated with said device interoperability system and coupled to said communications module, wherein said storage stores an operating system, one or more programs, and data associated with the user, further wherein said operating system is booted by said first user device via said first connection; and one or more processors to support said device interoperability system.

Systems, apparatuses and methods may provide for technology that detects, by a remote processor coupled to a remote socket, a transition request from a system processor coupled to a system socket, wherein the system socket has an indirect link with the remote socket. The technology may also automatically conduct an operational speed transition at the remote socket in response to the transition request, wherein the operational speed transition at the remote socket is to occur in parallel with a plurality of operational speed transitions at a corresponding plurality of peer sockets.

Based on power on of an electronic device, a location of first data in a NAND flash memory of an electronic device is determined. The first data is transmitted to a shadow RAM of the electronic device, outputting the first data is output from the shadow RAM to a host device of the electronic device through a serial peripheral interface (SPI) when accessing the location of the first data in the NAND Flash memory.

A system for granular reset management without reboot is disclosed. The system may include a subsystem, a processor including a reset management circuit coupled to the subsystem. The reset management circuit may include circuitry to receive a command to reset the subsystem, determine whether the subsystem can be reset without performing a system wide reboot, and based on a determination that the subsystem can be reset without performing a system wide reboot, block the use of the subsystem, drain the subsystem, and reset the subsystem. Circuity and method are also disclosed.