System and method for reducing latency for nested virtual machines. An example method may include: running, by a host computer system, a hypervisor managing a first virtual machine associated with a first virtual processor (vCPU) implemented by a first processing thread, wherein the first virtual machine manages a second virtual machine; creating, by the hypervisor, a second processing thread implementing a second vCPU associated with the second virtual machine; and responsive to receiving an interrupt directed to the second virtual machine, causing, by the hypervisor, the second processing thread to process the interrupt.

Methods, apparatus, systems, and articles of manufacture are disclosed to manage processor interrupts. An example apparatus includes at least one memory; instructions; and processor circuitry. The processor circuitry is to execute the instructions to receive an interrupt for a direct memory access to transfer a packet. The processor circuitry is to execute the instructions to decode a priority field in the packet to associate the interrupt with a traffic class. The processor circuitry is to execute the instructions to route the interrupt to an interrupt timer based on the traffic class, the interrupt timer to mask interrupts transmitted to the interrupt timer for a threshold period after receiving the interrupt. The processor circuitry is to execute the instructions to send the interrupt after the threshold period.

Embodiments of systems and methods for standby operation in a platform framework are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: identify an application registered with a platform framework via an Application Programming Interface (API); and at least one of: in response to the identification matching any entry in a whitelist, put the application in a throttled state during standby operation of the IHS; or in response to the identification not matching any entry in the whitelist, put the application in a suspended state during standby operation of the IHS.

The present invention relates to a device (1) such as a connected object comprising a first electronic circuit (2) comprising: a first processing unit (6) for executing a program, a first memory (8) for memorizing data during the execution of the program, a debug port (10) dedicated to checking the execution of the program from outside the first circuit,
a second electronic circuit (4) connected to the debug port (10), comprising: a second memory (14) memorizing reference data related to the program, a second processing unit (12) for implementing the following steps automatically and autonomously via the debug port (10): checking the integrity of the data memorized by the first memory (8) and/or the compliance of the program's execution by the first processing unit (6) with a reference execution, assisted by the reference data.

A method of identifying an unsupported storage device on a server is disclosed as including providing the server with a baseboard management controller (BMC), the BMC obtaining vital product data (VPD) from a storage device on the server, the BMC comparing the VPD from the storage device with one or more approved VPDs, and the BMC issuing an output in response to said comparison.

An object is to provide a user with motivation to enjoy waking up in the morning and guide the user to sufficient awakening by generating a breeding event in a breeding game of a virtual life form when the user wakes up in the morning. A game server that manages progress of a breeding game of a virtual life form can provide a user with motivation to enjoy waking up in the morning and guide the user to sufficient awakening by generating a breeding event in a breeding game of a virtual life form when the user wakes up in the morning. The game server includes circuitry configured to acquire a wake-up time of a user; and a update the breeding game in accordance with the acquired wake-up time.

A memory device in accordance with a described method of operation includes a read only memory (ROM) address controller and a suspend signal generator. The ROM address controller is configured to sequentially output a plurality of operation ROM addresses at which ROM codes to be executed in response to an operation command are stored, and to suspend output of the plurality of operation ROM addresses in response to a suspend signal. The suspend signal generator is configured to generate the suspend signal that is activated during a preset period depending on whether a suspend ROM address is identical to an operation ROM address, among the plurality of operation ROM addresses, currently being output. The suspend ROM address is an address at which a ROM code, execution of which is to be suspended, among the ROM codes, is stored.

In some implementations, a system may receive a record associated with an operation of the terminal. The system may determine that the operation is associated with a service involving a user of the terminal. The system may determine, based on the service and from location information in the record, a location of the terminal. The system may determine that an agent device is available in association with providing the service for the user, wherein the agent device is determined to be available based on a status of an application session of the agent device. The system may perform an action associated with the application session to enable the agent device to facilitate performance of the service for the user.

A computing system running a host operating system and a virtual machine (VM). The computing system includes at least one device that is directly assigned to the VM. The computing system is configured to execute one or more first VM components and one or more second VM components. The one or more first VM components are configured to manage the one or more second VM components via one or more identification pointers. While the one or more second VM components remain loaded in a system memory, and the directly assigned device remains attached to the VM and remains configured to communicate with the one or more second VM component, the one or more first VM components are shut down and restored.

An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes executable instructions for beginning execution of a first BMC firmware stack, and during execution of the first BMC firmware stack, halt execution of the first BMC firmware stack, and begin execution of a second BMC firmware stack. At least a portion of the executable instructions used to generate the first BMC firmware stack are different than the executable instructions used to generate the second BMC firmware stack.