G06F9/462

Allocation of resources to tasks

A method of managing resources in a graphics processing pipeline includes, in response to selecting a task for execution within a texture/shading unit, allocating to the task both a static allocation of temporary registers for the entire task and a dynamic allocation of temporary registers. The dynamic allocation comprises temporary registers used by a first phase of the task only and the static allocation of temporary registers comprises any temporary registers that are used by the program and are live at a boundary between two phases. When the task subsequently reaches a boundary between two phases, the dynamic allocation of temporary registers are freed and a new dynamic allocation of temporary registers for a next phase of the task is allocated to the task.

Allocation of Resources to Tasks
20250316014 · 2025-10-09 ·

A method of managing resources in a graphics processing pipeline includes, in response to selecting a task for execution within a texture/shading unit, allocating to the task both a static allocation of temporary registers for the entire task and a dynamic allocation of temporary registers. The dynamic allocation comprises temporary registers used by a first phase of the task only and the static allocation of temporary registers comprises any temporary registers that are used by the program and are live at a boundary between two phases. When the task subsequently reaches a boundary between two phases, the dynamic allocation of temporary registers are freed and a new dynamic allocation of temporary registers for a next phase of the task is allocated to the task.

Electronic device capable of performing multi-camera intelligent switching and multi-camera intelligent switching method thereof

An electronic device capable of performing multi-camera intelligent switching and a multi-camera intelligent switching method thereof are provided. The electronic device includes a plurality of camera device media foundation transform (camara DMFT) units, an integrated DMFT unit and a mix camera agent. Each of the camera DMFT units is connected to one of a plurality of cameras. The integrated DMFT unit is serially connected to one of the camera DMFT units. The mix camera agent is connected to the cameras. The mix camera agent is used for obtaining a switching notification signal. The integrated DMFT unit switches a serial path between the integrated DMFT unit and one of the camera DMFT units according to the switching notification signal.

SYSTEMS AND METHODS FOR IMPROVED HANDLING OF PROCESSOR INTERRUPTS

An apparatus includes a first interrupt priority register that maps a first portion of each nested interrupt identification (ID) value of a set of nested interrupt ID values to a first set of priority levels. Each of the first portions corresponds to one of the first set of priority levels. A second interrupt priority register maps a second portion of each nested interrupt ID value to a second set of priority levels, such that each nested interrupt ID value corresponds to two priority levels. The set of nested interrupt ID values corresponds to merged interrupt sources coupled to a single interrupt line.

Instruction stream retrograding to enhance random test generation

A computer system, computer readable storage medium, and computer-implemented method for retrograding an instruction stream to enhance random test generation. The method includes generating a test case for a design-under-test (DUT) comprising positioning one or more placeholder instructions in the test case. The method also includes identifying one or more benefiting instructions. The method further includes executing the test case by replacing the one or more placeholder instructions with one or more respective retrograding instructions. The one or more retrograding instructions influence the one or more benefiting instructions.