Technologies for composing a managed node with multiple processors on multiple compute sleds to cooperatively execute a workload include a memory, one or more processors connected to the memory, and an accelerator. The accelerator further includes a coherence logic unit that is configured to receive a node configuration request to execute a workload. The node configuration request identifies the compute sled and a second compute sled to be included in a managed node. The coherence logic unit is further configured to modify a portion of local working data associated with the workload on the compute sled in the memory with the one or more processors of the compute sled, determine coherence data indicative of the modification made by the one or more processors of the compute sled to the local working data in the memory, and send the coherence data to the second compute sled of the managed node.

A method of performing a remotely-initiated procedure on a computing device is provided. The method includes (a) receiving, by memory of the computing device, a request from a remote device via remote direct memory access (RDMA); (b) in response to receiving the request, assigning processing of the request to one core of a plurality of processing cores of the computing device, wherein assigning includes the one core receiving a completion signal from a shared completion queue (Shared CQ) of the computing device, the Shared CQ being shared between the plurality of cores; and (c) in response to assigning, performing, by the one core, a procedure described by the request. An apparatus, system, and computer program product for performing a similar method are also provided.

Systems and methods are described for processing ingested data using an online machine learning algorithm as the data is being ingested. For example, the online machine learning algorithm can be an adaptive thresholding algorithm used to identify outliers in a moving window of data. As another example, the online machine learning algorithm can be a sequential outlier detector that detects anomalous sequences of logs or events. As another example, the online machine learning algorithm can be a sentiment analyzer that determines whether text has a positive, negative, or neutral sentiment. As another example, the online machine learning algorithm can be a drift detector that detects whether ingested data marks the start of a change in the distribution of a time-series.

Systems, methods, and apparatuses relating to circuitry to precisely monitor memory store accesses are described. In one embodiment, a system includes a memory, a hardware processor core comprising a decoder to decode an instruction into a decoded instruction, an execution circuit to execute the decoded instruction to produce a resultant, a store buffer, and a retirement circuit to retire the instruction when a store request for the resultant from the execution circuit is queued into the store buffer for storage into the memory, and a performance monitoring circuit to mark the retired instruction for monitoring of post-retirement performance information between being queued in the store buffer and being stored in the memory, enable a store fence after the retired instruction to be inserted that causes previous store requests to complete within the memory, and on detection of completion of the store request for the instruction in the memory, store the post-retirement performance information in storage of the performance monitoring circuit.

An application includes main program code, but also a call handler and an update module. When a specific method or function in the operating system is called, the call is redirected to the call handler in the application. The call handler then calls the function in the operating system. The function retrieves an object to present in a user interface to the application. But before the object is rendered, program control is returned to the call handler, which calls into the update module. The update module determines whether or not the appearance of the object should be changed, for example, in accordance with an A/B test or any other type of update. If so, visual characteristics of the object are changed. Control reverts back to the operating system from the call handler and the object, in its changed form, is presented in the user interface.

A processor system comprises a shared memory and a processing element. The processing element includes a matrix processor unit and is in communication with the shared memory. The processing element is configured to receive a processor instruction specifying a data matrix and a matrix manipulation operation. A manipulation matrix based on the processor instruction is identified. The data matrix and the manipulation matrix are used to perform a matrix operation to determine a result matrix.

API in conjunction with a bridge chip and first and second hosts having first and second memories respectively. The bridge chip connects the memories. The API comprises key identifier registration functionality to register a key identifier for each of plural computer processes performed by the first host, thereby to define plural key identifiers; and/or access control functionality to provide at least computer process P1 performed by the first host with access, typically via the bridge chip, to at least local memory buffer M2 residing in the second memory, typically after the access control functionality first validates that process P1 has a key identifier which has been registered, e.g., via the key identifier registration functionality. Typically, the access control functionality also prevents at least computer process P2, performed by the first host, which has not registered a key identifier, from accessing local memory buffer M2, e.g., via the bridge chip.

Examples described herein relate to a network interface device that includes packet processing circuitry and circuitry. In some examples, the circuitry is to execute a first process to provide a remote procedure call (RPC) interface for a second process. In some examples, the second process comprises a business logic. In some examples, resource and deployment definitions of the first and second processes are based on an Interface Description Language (IDL) and a memory allocation. In some examples, the memory allocation among the processes provides share at least one RPC message as at least one formatted object accessible from memory.

According to one embodiment, a semiconductor device restricts an OS capable of using a functional block by an OS identifier written in an attribute register for restricting an accessible OS, and creates operation setting values of a first input unit, a second input unit, and a screen synthesis unit per OS to describe them in a setting value list stored in a shared memory, and each of the first input unit, second input unit, and screen synthesis unit has a mask circuit that refers to the OS identifier of the attribute register and in which write of the operation setting values into the setting register group of an own block is hampered, the operation setting values being described in the setting value list created by an OS other than the OS having a use authority for the own block.

The present application discloses a message transmitting method and device for a robot operating system. A specific embodiment of the method comprises: searching by looping through a memory segment in a shared memory, by a transmitting node, a memory block having a memory block indicator comprising a writing mark of “writeable” and a reading mark of “0”; amending, by the transmitting node, the writing mark of the memory block indicator of the memory block searched out to indicate that the memory block is being written, and then writing data into the memory block searched out; and resetting, by the transmitting node, the writing mark of the memory block indicator of the memory block searched out to indicate that the memory block is writable after the data is written, releasing the memory block searched out and notifying a receiving node that the memory block searched out is readable. The embodiment can realize that transmitting nodes and receiving nodes may subsequently read or write data in a shared memory without interference.