G06F9/544

HARDWARE COHERENCE FOR MEMORY CONTROLLER

A system includes a non-coherent component; a coherent, non-caching component; a coherent, caching component; and a level two (L2) cache subsystem coupled to the non-coherent component, the coherent, non-caching component, and the coherent, caching component. The L2 cache subsystem includes a L2 cache; a shadow level one (L1) main cache; a shadow L1 victim cache; and a L2 controller. The L2 controller is configured to receive and process a first transaction from the non-coherent component; receive and process a second transaction from the coherent, non-caching component; and receive and process a third transaction from the coherent, caching component.

Host-Assisted Memory-Side Prefetcher
20210390053 · 2021-12-16 · ·

Methods, apparatuses, and techniques related to a host-assisted memory-side prefetcher are described herein. In general, prefetchers monitor the pattern of memory-address requests by a host device and use the pattern information to determine or predict future memory-address requests and fetch data associated with those predicted requests into a faster memory. In many cases, prefetchers that can make predictions with high performance use appreciable processing and computing resources, power, and cooling. Generally, however, producing a prefetching configuration that the prefetcher uses involves more resources than making predictions. The described host-assisted memory-side prefetcher uses the greater computing resources of the host device to produce at least an updated prefetching configuration. The memory-side prefetcher uses the prefetching configuration to predict the data to prefetch into the faster memory, which allows a higher-performance prefetcher to be implemented in the memory device with a reduced resource burden on the memory device.

REGULAR PATH QUERIES (RPQS) FOR DISTRIBUTED GRAPHS

A pattern matching engine interprets a query into a data structure resembling a finite state machine. Vertices in the query pattern are treated as states or stages, while edges connecting them are treated as state transitions or hops. To match the full pattern, the first stage is first matched by applying vertex filters, if any. If the vertex is eligible, its edges that satisfy the edge filters, if any, are followed to move to the neighbors that can potentially produce results, thus progressing to the next stage. This process is repeated; if all stages are matched, then the whole pattern has been matched successfully.

ARCHITECTURE FOR LARGE PAYLOAD HANDLING IN EVENT PIPELINE
20210389998 · 2021-12-16 ·

Systems and methods are provided for automatically orchestrating the handling of events through a processing pipeline without limitation (or without a substantial limitation) as to the size of the event payload associated with the event. The event pipeline system stores event payloads in data stores and generates notifications regarding the events. The notifications may be placed into event streams for handling by various processing components of the event pipeline system. The processing components may receive notifications or events that they are to process, and may separately access event payloads from the data stores. The processing components may generate and save processed event payloads to the data stores in a streaming fashion such that the computing resources of the processing components do not limit (or substantially limit) the size of the event payloads that the processing components may handle.

Technolgies for millimeter wave rack interconnects

Racks and rack pods to support a plurality of sleds are disclosed herein. Switches for use in the rack pods are also disclosed herein. A rack comprises a plurality of sleds and a plurality of electromagnetic waveguides. The plurality of sleds are vertically spaced from one another. The plurality of electromagnetic waveguides communicate data signals between the plurality of sleds.

Method and device for managing stateful application on server

Embodiments of the present disclosure relate to a method and a device for managing a stateful application on a server. The method includes, in response to receiving a first request from a client for initializing the stateful application, allocating a storage resource to the stateful application. The method further includes, in response to receiving a second request from the client for processing data, storing the data in the storage resource. The method also includes enabling the stateful application to process the stored data.

Scalable message passing architecture in a cloud environment

Methods, systems, and computer-readable media for creating and managing a multi-tiered service messaging architecture within a cloud service provider or computing environment. In one or more embodiments, the multi-tiered service messaging architecture may comprise a primary topic configured to receive and manage particular service messages. Services of the cloud are allocated a service topic to receive the service messages managed by the primary topic and may itself subscribe to the primary topic to receive the service messages. Through the subscription to the service topic, the service may receive the service messages provided by the primary topic. Still other sub-topics may subscribe to the service topics for additional subscriptions by services to receive the service messages provided by the primary topic.

Method and system for pixel channel imbalance compensation for image sensing circuit

A method and a system for pixel channel imbalance compensation for an image sensing circuit are provided. The system includes an image acquisition circuit having a lens, a color filter and an image sensor and a processing circuit. In the method performed by the processing circuit, a second frame image is retrieved from a motion image, and a first frame image that has undergone noise reduction can be retrieved from a memory. Motion detection is performed between the frames by comparing the first frame image and the second frame image. The motion detection is referred to as a reference for determining how to perform 3D noise reduction. A compensation value for channel imbalance between the adjacent channels can be estimated based on the image under noise reduction in a same buffer. While the pixel channel imbalance is compensated, the image is then restored by an interpolation method.

DATA PROCESSING
20210382766 · 2021-12-09 · ·

A data processing system comprising a processor and memory and on which is running an operating system. A computer program executable for implementing a control application for controlling an embedded system is loaded in the memory which controls the operating system to instantiate in an operating system memory a plurality of data processing components and a communication component. The communication component is configured to facilitate data communication between the data processing components using a publish-subscribe messaging pattern. The communication component and data processing components are instantiated in a single memory address space.

METHOD OF DETERMINING PIPELINE DIVISION POSITION AND INFORMATION PROCESSING APPARATUS
20210382767 · 2021-12-09 · ·

A method of determining a pipeline division position includes receiving, by a computer, first information on a pipeline that includes a plurality of nodes that represent arithmetic operations, and second information on an amount of communication between nodes at each of a plurality of division positions at which the pipeline is divided, and selecting a division pattern from a plurality of division patterns, each of which includes at least one division position, based on the amount of communication at the at least one division position included in each of the division patterns and a node number of each of partial pipelines after division in each of the division patterns.