A processing module of a dispersed storage network determines an obfuscation method is determined from a plurality of obfuscation methods for a data segment. The method continues with the processing module obfuscating the data segment according to the obfuscation method to produce an obfuscated data segment. The obfuscated data segment is encrypted and dispersed storage error encoded to produce a set of encoded data slices. The set of encoded data slices is then transmitted for storage in the dispersed storage network.

In one embodiment, a solid state drive (SSD) comprises a plurality of non-volatile memory dies communicatively arranged in one or more communication channels, each of the plurality of non-volatile memory dies comprising a plurality of physical blocks, one or more channel controllers communicatively coupled to the one or more communication channels, respectively, and a memory controller communicatively coupled to the plurality of non-volatile memory dies via the one or more channel controllers, wherein the memory controller is configured to assign (i) the plurality of physical blocks of a first die of the plurality of non-volatile memory dies to only a first region and (ii) the plurality of physical blocks of a second die of the plurality of non-volatile memory dies to only a second region, perform only read operations on the first region in a first operation mode, and perform write operations or maintenance operations on the second region in a second operation mode concurrently with read operations on the first region in the first operation mode.

Various disclosed embodiments pertain to a distributed audit trail system for use in a connected system including: a master unit to control a first aspect of the connected system and to create a blockchain light client and a distributed hash table (DHT); a first node to control a second aspect of the connected system; a second node to control a third aspect of the connected system; and one or more remote servers to form a blockchain full node, where the master unit, the first node, and the second node electronically communicate with each other through the DHT in order to form a combined audit trail, where the master unit creates a meta-hash of the software version of the software in the master unit, the first node, and the second node, system identification data, system sensor data, and system hardware configuration.

The present disclosure relates to a method for mitigating an error of a quantum circuit in a quantum computer, the method including: detecting a quantum circuit to be mitigated among a plurality of quantum circuits forming the quantum computer; invoking a pre-trained deep learning model for mitigating an error of the plurality of quantum circuits; inferring an error correction value of the detected quantum circuit using the invoked deep learning model; and mitigating an error of the detected quantum circuit based on the inferred error correction value.

Memory might include controller configured to apply a first predetermined voltage level to a capacitance of a sense circuit during a first sensing stage of a sensing operation, determine a first value of an output of the particular sense circuit while applying the first predetermined voltage level, apply a second predetermined voltage level to the capacitance during a second sensing stage of the sensing operation, determine a second value of the output of the particular sense circuit while applying the second predetermined voltage level, determine a particular voltage level in response to at least the first value and the second value, and apply the particular voltage level to the capacitance during a final sensing stage of the sensing operation.

A method of operation in an integrated circuit (IC) memory device is disclosed. The method includes refreshing a first group of storage rows in the IC memory device at a first refresh rate. A retention time for each of the rows is tested. The testing for a given row under test includes refreshing at a second refresh rate that is slower than the first refresh rate. The testing is interruptible based on an access request for data stored in the given row under test.

A storage control device, includes a memory; and a processor coupled to the memory and the processor configured to: identify a storage device to store a target data to be backed up, generate relational information which indicates a relationship between a write data size, an environmental temperature, and write loads by using write performance of the storage device when an operation of the storage control device is normal, and when storing the target data in the storage device, determine one of the write loads by using the relational information.

A method of failure detection in a storage system is performed by the storage system. The method includes detecting a failure in a nonvolatile random access memory device that is in or coupled to a storage device having storage memory. The storage system has multiple NVRAM devices and multiple storage devices that have storage memory. The method includes taking a portion or all of the NVRAM device offline. Taking a portion or all of the NVRAM device offline is responsive to detecting the failure. Taking a portion or all of the NVRAM device off-line is while keeping online the storage memory of the storage device, sufficient ones of the NVRAM devices, and sufficient ones of the storage devices to provide reliable access to data and metadata in the storage system.

There is a method and a corresponding system for performing partial write operations to memory. This method and corresponding system utilizes an XOR operation to generate error checking bits. Once the error checking bits are generated, they are then used for error checking a set of data bits so that these data bits can be written to memory.

A memory controller includes a buffer memory configured to store first meta data and second meta data having a different type from the first meta data, and a cache memory including first and second dedicated areas. The first meta data is cached in the first dedicated area and the second meta data is cached in the second dedicated area.