Apparatuses, systems, and methods related to determination of a match between data values stored by three or more arrays are described. A system using the data values may manage performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on whether the data values match. For instance, one apparatus described herein includes a plurality of arrays of memory cells formed on a single memory chip. The apparatus further includes comparator circuitry configured to compare data values stored by three arrays selected from the plurality to determine whether there is a match between the data values stored by the three arrays. The apparatus further includes an output component configured to output data values of one of two arrays of the three arrays responsive to determination of the match between the data values stored by the two arrays.

Failure of a processing unit that processes a plurality of information pieces is discovered in a short time. An information processing device 100 including a processing unit 1 that processes a plurality of information pieces includes: an identifier assignment unit 2 that assigns identifiers 60000 to 61023 to the plurality of information pieces 40000 to 41023, respectively; a plurality of input memories 20000 to 21023 that retain the plurality of information pieces 40000 to 41023 and the identifiers 60000 to 61023 assigned to the plurality of information pieces 40000 to 41023, respectively; a plurality of output memories 30000 to 31023 that retain the plurality of information pieces 50000 to 51023 processed by the processing unit 1 and the identifiers 70000 to 71023 assigned to the plurality of processed information pieces 50000 to 51023, respectively; an identifier verification unit 3 that verifies the identifiers 70000 to 71023 by comparing the identifiers 70000 to 71023 with the identifiers 60000 to 61023, respectively; and an error handling unit 4 that performs error handling when identifiers do not match with each other.

Filter information including a first temperature level and a second temperature level associated with a test process to be executed on one or more memory components is determined. Information associated with the test process is distributed to a first test component including a first set of memory components and a first temperature control component and a second test component including a second set of memory components and a second temperature control component. First feedback information associated with execution of the test process by the first test component at the first temperature level established by the first temperature control component is received. Second feedback information associated with execution of the test process by the second test component at the second temperature level established by the second temperature control component is received. Based on at least one of the first feedback information or the second feedback information, a failure of the test process executed using at least one of the first temperature level or the second temperature level is determined.

In one set of embodiments, a storage system can execute a repair process for a first component of a file or object stored on the storage system, where the repair process is initiated in response to the first component becoming inaccessible by the storage system, and where the file or object is split across a plurality of components including the first component. The executing can include, for each chunk in an address space of the first component starting from an initial chunk pointed to by a cursor: (1) determining whether the chunk is mapped to the first component, (2) if the chunk is mapped to the first component, copying data for the chunk from a mirror copy of the first component to a second component in the plurality of components, and (3) updating the cursor to point to a next chunk in the address space.

An electronic apparatus and a data verification method using the same are provided. The electronic apparatus includes a first read-only memory having first data, a second read-only memory having second data and a controller. A correspondence relation exists between the first data and the second data. The controller is coupled to the first read-only memory and the second read-only memory. The controller reads first sub-data of the first data from the first read-only memory, and reads second sub-data of the second data corresponding to the first sub-data from the second read-only memory according to the correspondence relation. The first sub-data includes to-be-verified data. The controller perfoi ins a verification operation to the to-be-verified data according to the first sub-data, the second sub-data and the correspondence relation.

Method, apparatus, and system for improving semiconductor device writeability at row/bit level through bias temperature instability. Such a device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line comprises a supply voltage line (VCS) which supplies voltage to each latch of a first number of cells; an array VCS driver electrically connected to each VCS; and a control line configured to provide an operational array supply voltage, a first array supply voltage, or a second array supply voltage to each VCS, wherein the first array supply voltage and the second array supply voltage are greater than the operational array supply voltage. By virtue of BTI, application of the first array supply voltage may lead to improved writeability of one or more cells of the device.

A method for detecting an error in reading a data, includes in a step a) storing a first copy of the data item in a first area of an electronic memory and storing of a second copy of the data item in a second area. Step b) includes reading values of the first and second copies of the data item and in step c) there is a comparison of the read values of the first and second copies of the data item. In step d) if the read values of the first and second copies are identical, then no error is detected. In step e) if the read values of the first and second copies are different, then the method includes repeating steps b) and c). In step f), if the values read in step e) are identical, then an error in the reading of the data item is detected and, otherwise, no error is detected.

A method and apparatus of performing fault tolerance in a fault tolerant computer system comprising: a primary node having a primary node processor; a secondary node having a secondary node processor, each node further comprising a respective memory; a respective checkpoint shim; each of the primary and secondary node further comprising: a respective non-virtual operating system (OS), the non-virtual OS comprising a respective; network driver; storage driver; and checkpoint engine; the method comprising the steps of: acting upon a request from a client by the respective OS of the primary and the secondary node, comparing the result obtained by the OS of the primary node and the secondary node by the network driver of the primary node for similarity, and if the comparison of indicates similarity less than a predetermined amount, the primary node network driver informs the primary node checkpoint engine to begin a checkpoint process.

Certain embodiments may relate to providing increased storage capacity. For instance, a memory storage device may include a motherboard with an external communication interface. The memory storage device may also include a multiple solid-state drives coupled to the motherboard in communication with the external communication interface. Each of the plurality of solid-state drives may include a respective storage controller to manage the distribution of data during a write or read operation to a combination of a primary storage allocation and a redundant storage allocation. The redundant storage allocation may be included in the combination in response to detecting an error condition associated with at least a portion of the primary storage allocation.

A method includes storing, by a set of storage units, a set of appended encoded data slices, where an appended encoded data slice of the set of appended encoded data slices includes an encoded data slice of a set of encoded data slices and slice verification information. The method further includes identifying, by a rebuilding agent, one of the set of appended encoded data slices for rebuilding, rebuilding the encoded data slice, generating current slice verification information, and sending an appended rebuilt encoded data slice that includes the rebuilt encoded data slice and the current slice verification information to a storage unit. The method further includes verifying, by the storage unit, the current slice verification information corresponds to the slice verification information, and when the current slice verification information corresponds to the slice verification information, storing the appended rebuilt encoded data slice as a trusted rebuilt encoded data slice.