There are disclosed various methods, apparatuses and computer program products for a testing apparatus. In accordance with an embodiment the testing apparatus includes a frame; a gripping head for gripping a device to be tested; a first movement element for moving the gripping head with respect to the frame; a movement detector to detect at least one of a location and a position of the device; a touching element for touching the device; an imaging device for capturing images of the device; a display for generating visual information for capturing by the device; a set of sensors for examining operations of the device; a set of actuators for providing signals for reception by the device; and a set of plugs adapted to be inserted into a socket of the device.

A test system for testing a device under test includes: a signal processor configured to generate a plurality of independent signals and to apply first fading channel characteristics to each of the independent signals to generate a plurality of first faded test signals; a test system interface configured to provide the plurality of first faded test signals to one or more signal input interfaces of the device under test (DUT); a second signal processor configured to apply second fading channel characteristics to a plurality of output signals of the DUT to generate a plurality of second faded test signals, wherein the second fading channel characteristics are derived from the first fading channel characteristics; and one or more test instruments configured to measure at least one performance characteristic of the DUT from the plurality of second faded test signals.

A GUI testing device may be configured to execute a testing state machine for interacting with a software application to generate an initial screen of a GUI. The GUI testing device may be configured to determine a current state in the testing state machine based upon a matching trigger target in the initial screen to a given state. The current state may include an operation, and the operation may associate with a trigger target to operate on. The trigger may include a source state, a destination state, and a trigger target. The operation may include a user input operation, and an operation trigger target. The GUI testing device may be configured to perform the operation on the matching trigger target in the initial screen to generate a next screen of the GUI, and advance from the current state to a next state based upon the trigger.

In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.

Methods and computing devices for allocating test pods to a distributed computing system for executing a test plan on a device-under-test (DUT). Each test pod may include a test microservice including one or more test steps and an event microservice specifying function relations between the test microservice and other test microservices. The test pods are allocated to different servers to perform a distributed execution of the test plan on the DUT through one or more test interfaces.

A semiconductor device includes a debug port, a first access port, a second access port, a first processing unit, a second processing unit, and an embedded emulator unit. The first access port is coupled to the debug port. The second access port is coupled to the debug port. The first processing unit is coupled to the first access port. The second processing unit is coupled to the second access port. The embedded emulator unit is coupled to the debug port, the first processing unit and the second processing unit. The first processing unit generates a debug instruction to access the embedded emulator unit, so that the embedded emulator unit generates a debug signal. The debug signal is output to the second processing unit through the debug port and the second access port, so as to perform a debug operation on the second processing unit.

A test apparatus is provided for use with a mainframe and an adapter. The test apparatus includes a logical adapter interface unit and a control system. The logical adapter interface unit is interposable between the adapter and the mainframe whereby an I/O signal transmittable from the adapter and to the mainframe is transmitted through the logical adapter interface unit. The logical adapter interface unit is configured to manipulate the I/O signal. The control system is coupled to the logical adapter interface unit and the mainframe and is configured to control manipulations of the I/O signal by the logical adapter interface unit to mimic a condition of I/O traffic being run through the adapter and to log a response of the mainframe to the manipulations.

A method for processing data between host computer and CPLD provides a host computer, a circuit board comprising a UART unit, a pre-debugged hardware, and a CPLD. The UART unit communicates with the host computer via UART. The method further provides the CPLD coupled between the UART unit and the pre-debugged hardware and allows the CPLD to receive data from the host computer via the UART unit and to analyze the data. According to the method, the CPLD debugs the pre-debugged hardware according to the analyzed data and obtains a result of debugging. The CPLD outputs the result and allows the CPLD to transmit the result to the host computer via the UART unit. A system using the method is also provided.

There is provided a system and method for performing system integration on an embedded system of a connected and/or autonomous vehicle. Integration testing may include obtaining one or more requirements and/or specifications for a system under test; generating a metamodel based on the requirements and/or specifications; generating test cases based on the metamodel; prioritizing said test cases based on hazards associated with said test cases; executing one or more of said prioritized test cases; and obtaining a verdict for each of said one or more prioritized test cases.

A JTAG-based burning device, comprising controllable switches provided between a TDI end of a JTAG host (1) and a first chip and between every two adjacent chips, and further comprising a main controllable switch module (2) provided between each chip and a TDO end of the JTAG host (1). According to a received burning instruction, the JTAG host (1) can control an input end of a corresponding controllable switch to be connected to a corresponding output end thereof, and also control an output end of the main controllable switch module (2) to be connected to a corresponding input end thereof. Hence, the device merely needs to build a circuit to automatically adjust a JTAG link by controlling the connection relationship between the input end and the output end of the corresponding switch, achieving burning of the firmware of different chips or a combination of chips, without manual adjustment, thereby improving the test efficiency, and simplifying a circuit structure.