A system includes test control circuitry in parallel with power control circuitry. The power control circuitry enables a core processor and memory interface drivers responsive to a reset. The test control circuitry can enable the memory interface drivers separately from the core processor to enable testing of the connections to the memory devices. The test control circuitry is triggered separately from the other power control circuitry, and can be protected to allow only secured access for testing.

An aircraft annunciator (illuminated switch or indicator) includes, within a housing sized to fit in the panel cutout for a single pushbutton aviation switch, a bus converter to interface with a multiplexed ARINC serial data bus, in order to monitor a remote item of equipment such as an ADS-B transponder. The annunciator is coupled by selected pins to receive data words from the multiplexed ARINC serial data bus. A watchdog timer is continuously reset by valid messages from the transponder, logically ORed with the power supply as well as external analog fault signals in order to generate an output controlling illumination of an FAA-mandated ADS-B FAIL legend on the annunciator.

Diagnosing faults in a hardware appliance. Information is read by a hand-held reader from one or more contactless tags associated with one or more components in a hardware appliance. One or more component faults and/or issues are identified based on the read information. A query is formed based on the identified one or more component faults and/or issues. A diagnostic database in the hand-held reader is queried, based on the formed query, and one or more query results are displayed in a ranked order on a display of the hand-held reader. In one aspect of the embodiments, the information read from the one or more contactless tags includes a pointer to a datastore in one of the one or more components. An ad hoc wireless network connection is established with the hardware appliance, and information in the datastore is downloaded over the connection.

A distributed system according to an exemplary embodiment includes first and second servers capable of executing the same application, wherein when a failure occurs in the application in the first server, the first server generates failure information identifying a cause of the failure in the application, and the second server performs failure prevention processing which is determined based on the failure information and intended to prevent a failure in the application.

Disclosed aspects relate to controlling an electronic circuit having multiple units with at least one signal input each. A set of signal resources is determined by tracing back a dependency tree for each unit signal input until an endpoint representing a signal resource is reached. For each signal resource in the set a resource manager may be provided in dependence of its signal type. That resource manager may be assigned a set of signal inputs comprising each signal input in the circuit which was traced back to its respective signal resource. The resource manager is configured for controlling the signal resource. A control device may be provided to receive technical implementation requirements for one or more of the resource managers, detect conflicting requirements received for the one or more resource managers, and enable or disable one or more of the resource managers in response to the detected conflicting requirements.

A technical solution for improving test times and costs associated with IC production includes a central test engine (CTE) functional test block integrated onto an IC. The CTE functions as a hardware abstraction layer (HAL), and provides testing capabilities by transferring a large test data file to a device under test and performing a closed-loop monitoring of receipt of the expected test data results. The CTE also reduces the number of external interfaces and interface controllers used during testing. The reduction in external interfaces reduces the size of the IC, which enables smaller and more efficient IC manufacturing, and may be used to improve small form-factor high-volume manufacturing (HVM). This reduction in IO pins also enables significant reduction in IO resources (e.g., IO drivers) within the IC, and reduces or eliminates IO test hardware dependencies.

An automated test equipment (ATE) system comprises a system controller communicatively coupled to a tester processor, where the system controller is operable to transmit instructions to the tester processor, and where the tester processor is operable to generate commands and data from the instructions for coordinating testing of a plurality of devices under test (DUTs). The apparatus also comprises an FPGA programmed to support a first protocol communicatively coupled to the tester processor comprising at least one hardware accelerator circuit operable to internally generate commands and data transparently from the tester processor for testing a DUT of the plurality of DUTs. Further, the apparatus comprises a bus adapter comprising a protocol converter module operable to convert signals associated with the first protocol received from the FPGA to signals associated with a second protocol prior to transmitting the signals to the DUT, wherein the DUT communicates using the second protocol.

An apparatus and method are described for a scalable testing agent. For example, one embodiment of a scalable test engine comprises: an input interface to receive commands and/or data from a processor core or an external test system, the commands and/or data to specify one or more test operations to be performed on one or more intellectual property (IP) blocks of a chip; a first circuit to establish communication with an IP block over an interconnect fabric, the first circuit to transmit the one or more test operations to the IP block responsive to the received commands and/or data, the IP block to process the test operations and generate results; and a second circuit to receive the results from the IP block over the interconnect fabric, the results to be provided from the second circuit to the processor core and/or the external test system for analysis.

Disclosed aspects relate to controlling an electronic circuit having multiple units with at least one signal input each. A set of signal resources is determined by tracing back a dependency tree for each unit signal input until an endpoint representing a signal resource is reached. For each signal resource in the set a resource manager may be provided in dependence of its signal type. That resource manager may be assigned a set of signal inputs comprising each signal input in the circuit which was traced back to its respective signal resource. The resource manager is configured for controlling the signal resource. A control device may be provided to receive technical implementation requirements for one or more of the resource managers, detect conflicting requirements received for the one or more resource managers, and enable or disable one or more of the resource managers in response to the detected conflicting requirements.

The invention refers to a method for accessing an passenger transportation device control means comprising several separated printed circuit boards (PCB), whereby each of these PCBs comprises a unique identifier (ID), and in which method the passenger transportation device control means comprise a matching table which is used by the passenger transportation device control means to perform a matching test to check the identifier of at least two of the PCBs and to put the passenger transportation device control means into normal operation only if their IDs match the IDs of the matching table. A service technician connects via a key to the passenger transportation device control means, which key enables the service technician to set the passenger transportation device control means into a fault finding mode, in which fault finding mode the passenger transportation device control means are initiated to skip the matching test before getting into operation, whereby the fault finding mode is terminated at the latest when the service technician terminates the key-based connection with the passenger transportation device control means.