Patent classifications
G06F11/349
Vehicle bus-based communication method, apparatus and computer device
The present invention provides a vehicle bus-based communication method and apparatus, a computer device and a storage medium. The vehicle bus-based communication method includes: monitoring data flows transmitted through a vehicle bus by vehicle electronic control units; determining undetected data flows in to-be-obtained data flows when the monitoring reaches a first time length; broadcasting data flow obtaining requests through the vehicle bus, the data flow obtaining requests specifying queries for the undetected data flows; and obtaining data flows that are fed back through the vehicle bus in response to the data flow obtaining requests. When data flows of a vehicle are obtained through a vehicle bus, data flows on the vehicle bus are first obtained in a monitoring manner, thereby ensuring data flow obtaining efficiency. After the monitoring is performed for a period of time, data flows that are not obtained in a monitoring-and-obtaining manner are obtained by sending corresponding data flow obtaining requests to the vehicle bus, so that it is ensured that relatively more complete data flows of the vehicle can be obtained.
PRECISE SHADOWING AND ADJUSTMENT OF ON-DIE TIMERS IN LOW POWER STATES
An integrated circuit (IC) includes a first circuit including a timer for receiving an adjustable clock signal. Responsive to leaving the non-operational power state to enter a power state in which the adjustable clock has a lower frequency than the reference clock, the first circuit adjusts the frequency of the adjustable clock to a frequency higher than the lower frequency, and then receives an elapsed time associated with the non-operational power state and starts the timer using an adjusted timer value.
Optimizing backup performance with heuristic configuration selection
Embodiments are described for a heuristic configuration selection process as part of or accessible by the backup management process. This processing component provides a method to automatically determine the configuration parameters needed to obtain optimal performance for a given backup/restore job. This process involves identifying key parameters that determine backup performance and suggest means to derive and incorporate those configurable parameters into the backup software automatically. Embodiments can be applied to stream based backups, or other types of backup software as well.
BUS DECODER
According to an aspect, there is provided a solution for providing an access to a slave unit. An address from a master unit trying to access a slave unit is received (400). The received address is mapped (402) to a slave address. Default access permissions are associated (404) to the master-slave connection. Additional access permissions associated with the master unit and the slave address are determined (406). The master-slave connection is enabled (408) if additional access permissions allow the master unit to access the slave, otherwise the connection is rejected.
Debug Trace Fabric for Integrated Circuit
A trace network for debugging integrated circuits is disclosed. At least one functional network includes a plurality of components interconnected by a number of network switches, implemented on at least one integrated circuit. A trace network is also implemented on the at least one integrated circuit, and includes a plurality of trace circuits configured to generate trace data based on transactions between ones of the plurality of components. The plurality of trace circuits are coupled to one another by a plurality of trace network switches. The trace circuits are configured to convey the generated trace data to an interface, via the trace network, without using the at least one functional network.
Virtual computing cluster resource scheduler
In some embodiments, a method for cluster resource scheduling, includes determining at least one load score; determining a memory score; determining an IO score; and monitoring a message bus for candidate messages when each of the at least one load score, memory score, and IO score is less than a pre-determined health threshold. In some embodiments, a host computer system for hosting a plurality of virtual machines (VMs), includes: a memory; a network adapter for communicating with the cluster by way of a message bus; a processor in electronic communication with the memory and the network adapter, wherein the processor is programmed to: determine at least one load score; determine a memory score; determine an IO score; and monitor the message bus for candidate messages when each of the at least one load score, memory score, and IO score is less than a pre-determined health threshold.
Methods for detecting system-level trojans and an integrated circuit device with system-level trojan detection
Embodiments of a method, an IC device, and a circuit board are disclosed. In an embodiment, the method involves at an IC device of the system, monitoring activity on a bus interface of the IC device, wherein the bus interface is connected to a bus on the system that communicatively couples the IC device to at least one other IC device on the system, applying machine learning to data corresponding to the monitored activity to generate an activity profile, monitoring subsequent activity on the bus interface of the IC device, comparing data corresponding to the to subsequently monitored activity to the machine learning generated activity profile to determine if a system-level Trojan is detected, and generating a notification when it is determined from the comparison that a system-level Trojan has been detected.
FPGA upgrade method based on PCIe interface
An FPGA upgrade method is provided, including: delivering, by a host, an upgrade instruction to an FPGA; uninstalling a PCIe driver corresponding to the FPGA to let a status of the PCIe link be changed to link down; continuously monitoring, in a first expiration time, whether the status of the PCIe link is changed to link up; and if yes, reloading the PCIe driver. The method further includes: after the FPGA receives the upgrade instruction, continuously monitoring, in a second expiration time, whether the status of the PCIe link is changed to link down, if yes, loading the configuration data from the FPGA configuration memory for upgrade; and after upgrade is completed, negotiating, by the FPGA, with the host to restore the status of the PCIe link to link up that is used for reloading the PCIe driver upon detection by the host.
DYNAMIC MANAGEMENT OF LOCATIONS OF MODULES OF A PLATFORM HOSTED BY A DISTRIBUTED SYSTEM
In some implementations, a system may monitor session data associated with a first module and a second module of a platform. The system may determine a rate of communication between the first module and the second module based on the session data. The system may determine, using an optimization model, a co-location score associated with the first module and the second module based on the rate of communication, wherein the co-location score indicates an impact of co-location of the first module and the second module. The system may determine that the co-location score satisfies a co-location score threshold associated with an improvement to an operation of the platform. The system may perform an action associated with co-locating the first module and the second module.
DYNAMICALLY INFLUENCING BANDWIDTH
Buses such as USB4 or Thunderbolt 4 buses may allow for device combinations that actually cannot be accommodated on the bus. A monitoring component, e.g., software and/or hardware component, such as an Operating System (OS) policy manager, may monitor a bus for events identifying changes to devices on the bus. The monitoring component may influence mode changes to hardware/software, such as to the USB configuration, device driver settings, attached device settings, and/or settings for devices attaching to the bus. Influenced changes facilitate accommodating changes to the devices attached to the bus. For example, if a display is attached and it would exceed available bus bandwidth, cause an excess system load, or cause some other problem, rather than fail to enumerate the display, instead hardware and/or software associated with the bus may be influenced to result in a resolution reduction for the display to accommodate it attaching to the bus.