Patent classifications
G06F11/3656
METHOD FOR BLOCKING EXTERNAL DEBUGGER APPLICATION FROM ANALYSING CODE OF SOFTWARE PROGRAM
A method for blocking external debugger application from analysing code of software program installed on computing device. The method including initializing software program including an application program and an internal debugger application. The software program, upon initialization thereof, instructs internal debugger application to load application program in internal debugger application. The internal debugger application is configured to utilize kernel resources of an operating system of the computing device. The method includes executing internal debugger application to set one or more break-points in code of application program to define execution path for code of application program, executing application program as per defined execution path for code thereof, stopping execution of code of application program upon reaching any of one or more break-points therein, and handing control to internal debugger application to provide an address for next instruction to be executed in defined execution path for code of application program.
Systems and methods for intellectual property-secured, remote debugging
Systems and techniques of the present disclosure may provide remote debugging of an integrated circuit (IC) device while preventing unauthorized access of device intellectual property (IP). A system may include an IC device that generates an encrypted session key and an interface that enables communication between the IC device and a remote debugging site. The interface may enable the IC device to send the encrypted the encrypted session key to initiate a remote debug process, receive an acknowledgement from the remote debugging session, and authenticate the acknowledgement. Further, the interface may enable to the IC device to initiate a secure debug session between the IC device and the remote debugging site.
Management of a debug buffer based on priority information
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive new debug information, determine that a debug buffer does not have any available free entries for the new debug information, compare the priority information to a lowest priority information of old debug information stored in the debug buffer, remove a most recent old debug information that has a lowest priority information from the debug buffer, and place the new debug information and corresponding priority information in the debug buffer.
DEBUGGING OF ACCELERATOR CIRCUIT FOR MATHEMATICAL OPERATIONS USING PACKET LIMIT BREAKPOINT
Embodiments of the present disclosure relate to debugging of an accelerator circuit using a packet limit breakpoint. A vector circuit reads a subset of instruction packets from an instruction memory and receives a portion of input data from a data memory corresponding to the subset of instruction packets. The vector circuit executes a set of vector operations in accordance with multiple instruction packets from the subset using data from the received portion of input data identified in the multiple instruction packets to generate output data. A program counter control circuit coupled to the instruction memory triggers a breakpoint in a program stored in the instruction memory causing the accelerator circuit to stop executing remaining instruction packets in the program following the multiple instruction packets responsive to a number of instruction packets executed in the program from a time instant of an event reaching a predetermined number.
AUTOMATED WORKLOAD MONITORING BY STATISTICAL ANALYSIS OF LOGS
Methods, computer program products, and systems are presented. The methods include, for instance: A plurality of log messages generated while an application processes two or more workloads are collected. The application is microservice-based and each of the microservices generates respective log messages. A time domain analysis is performed to lay out respective iteration counts of the microservices of the application. Keyword patterns in the log messages are compiled and stored in a keywords database. A frequency domain analysis on the keyword patterns for respective numbers of appearances in the log messages and stored in a frequency domain analysis database. Logs generated from a new workload are automatically monitored for abnormality by comparing the logs by the new workload to the statistical pattern of keywords as established by previous workloads. For a deviation greater than a threshold, an alert is generated with issue location and delivered to preselected recipients.
Cloud controlled bug recovery
Disclosed herein is a system and method for bug fix recovery in an electronic device connected to a network. If a bug affecting a deployed electronic device is discovered, bug fix instructions for fixing, mitigating, or recovering from the bug, including rules and executable actions, can be stored in a cloud based server in communication with a deployed electronic device. Each set of instructions is associated with one or more identifiers of devices, firmware versions, and/or software versions that are affected by the bug. The server can be configured to query deployed electronic devices, and/or the deployed electronic devices can be configured to query the server to determine if a bug fix that is relevant to the electronic device has been stored on the server. Instructions can then be transmitted to the electronic device for execution or for display or announcement to a user (if user action is required).
Semiconductor apparatus and debug system
It is an object of the present invention to provide a debug system that accesses a semiconductor apparatus from the outside by a simple configuration at less overhead. The present invention relates to a semiconductor apparatus and a debug system. A large scale integration (LSI 11) includes a central processing unit (CPU 20), a debug control portion (21), an internal bus (22), a storage portion (23, 24, 26) connected to the internal bus, and a selector (27). According to a select control signal (CNT) from the CPU, the selector selects either a CPU select state of transmitting a signal from the CPU to the internal bus, or a debugger select state of transmitting a signal from the debug control portion to the internal bus. In principle, the selector is set to the CPU select state. Upon receiving a predetermined command from an external device (12, 13) by the debug control portion, a signal corresponding to the predetermined command is sent from the debug control portion to the CPU, and the selector is temporarily set to the debugger select state, thereby accessing the internal bus through the debug control portion.
High-performance computing-oriented method for automatically deploying execution environment along with job
A high-performance computing-oriented method for automatically deploying an execution environment along with a job, including: presetting isolated execution environments at nodes of a high-performance computing system; logging in an isolated execution environment of a login node; carrying out development and debugging on the job and configuration on a job execution environment at the login node, and issuing a job running request to a job management system; assigning compute nodes from the nodes of the high-performance computing system to the job of the user by the job management system, automatically deploying an file system of the user synchronously to the assigned compute nodes along with the job when the job is loaded, and running the job of the user by the corresponding compute nodes; and feeding results back to the login node of the user after running the job is completed, then clearing file systems.
Method and apparatus for analyzing side channel-related security vulnerabilities in digital devices
A method and apparatus for analyzing side-channel security vulnerabilities in a digital device. A first time sequence of measurements of side-channel related phenomena of the digital device, such as power draw or electromagnetic emissions is obtained. A second time sequence of debug outputs of the digital device, such as program counter contents or other device processor or register states, is obtained. The first time sequence and the second time sequence are obtained based on a common time reference, and thus correlated in time. A controller can provide a common timing signal to measurement equipment obtaining the first time sequence and to a debug tool obtaining the second time sequence, and the common time reference can be correspond to the common timing signal.
REMOTING APPLICATION ACROSS A NETWORK USING DRAW COMMANDS WITH AN ISOLATOR APPLICATION
A client device instantiates an isolator application. A request to instantiate a remote application in a server device is sent by the isolator application instance. The isolator application instance receives, from the remote application instance, draw commands and position information that correspond to the draw commands. The isolator application instance renders one or more portions of output based on the draw commands and the position information.