Patent classifications
G06F13/126
System, apparatus and method for fine-grain address space selection in a processor
In one embodiment, a processor comprises: a first configuration register to store a pointer to a process address space identifier (PASID) table; and an execution circuit coupled to the first configuration register. The execution circuit, in response to a first instruction, is to obtain command data from a first location identified in a source operand of the first instruction, obtain a PASID table handle from the command data, access a first entry of the PASID table using the pointer from the first configuration register and the PASID table handle to obtain a PASID value, insert the PASID value into the command data, and send the command data to a device coupled to the processor. Other embodiments are described and claimed.
SYSTEM AND METHOD FOR APPLICATION MIGRATION FOR A DOCKABLE DEVICE
Described is a method and apparatus for application migration between a dockable device and a docking station in a seamless manner. The dockable device includes a processor and the docking station includes a high-performance processor. The method includes determining a docking state of a dockable device while at least an application is running. Application migration from the dockable device to a docking station is initiated when the dockable device is moving to a docked state. Application migration from the docking station to the dockable device is initiated when the dockable device is moving to an undocked state. The application continues to run during the application migration from the dockable device to the docking station or during the application migration from the docking station to the dockable device.
Multiple processor computing device with configurable electrical connectivity to peripherals
A computing device, comprising at least one peripheral computing component, electrically connected to each of a plurality of hardware processors; wherein at least one of the plurality of hardware processors is adapted to executing a code for: configuring the at least one peripheral computing component to access at least one first memory location in a first memory component electrically coupled with a first hardware processor of the plurality of hardware processors via a first electrical connection between the peripheral computing component and the first hardware processor; and configuring the at least one peripheral computing component to access at least one second memory location in a second memory component electrically coupled with a second hardware processor of the plurality of hardware processors via a second electrical connection between the peripheral computing component and the second hardware processor; and wherein the first hardware processor is not the second hardware processor.
Shared peripheral devices
A peripheral device of a computing device may include a processor; a sharing module to, upon execution of the processor, allow the peripheral device to be shared with an external computing device over a network; and a communication module to, upon execution of the processor: provide data from the peripheral device to a peripheral device hub module of a computing device; and provide communication by the peripheral device with the external computing device.
Fibre channel host onboarding system
A Fibre Channel host onboarding system includes a Fibre Channel communication subsystem coupled to a host system in a modular computing system. The host system includes a Baseboard Management Controller (BMC) device that retrieves and transmits host system onboarding information associated with the host system. The host system also includes a Host Bus Adapter (HBA) device that is coupled to the BMC device, and that receives the host system onboarding information from the BMC device and, in response, transmits a host system discovery communication that includes the host system onboarding information to the Fibre Channel communication subsystem. When the HBA device determines that a host system discovery acknowledgement communication has been received from the Fibre Channel communication subsystem, it performs Fibre Channel fabric login operations with the Fibre Channel communication system that configure the host system for Fibre Channel communications via the Fibre Channel communication subsystem.
SYSTEM AND METHOD FOR APPLICATION MIGRATION FOR A DOCKABLE DEVICE
Described is a method and apparatus for application migration between a dockable device and a docking station in a seamless manner. The dockable device includes a processor and the docking station includes a high-performance processor. The method includes executing at least one application in the dockable device using a first processor, and initiating an application migration for the at least one application from the first processor to a second processor in a docking station responsive to determining that the dockable device is in a docked state, wherein the at least one application continues to execute during the application migration from the first processor to the second processor.
Data communications with enhanced speed mode
An interconnect controller includes a data link layer controller coupled to a transaction layer, wherein the data link layer controller selectively receives data packets from and sends data packets to the transaction layer, and a physical layer controller coupled to the data link layer controller and to a communication link. The physical layer controller selectively operates at a first predetermined link speed. The physical layer controller has an enhanced speed mode, wherein in response to performing a link initialization, the interconnect controller queries a data processing platform to determine whether the enhanced speed mode is permitted, performs at least one setup operation to select an enhanced speed, wherein the enhanced speed is greater than the first predetermined link speed, and subsequently operates the communication link using the enhanced speed.
Storage system with plurality of storage controllers communicatively coupled for determination of storage controller indentifiers
Provided is a storage system in which a plurality of storage controllers communicate with each other and an identifier of each storage controller is determined. The storage system includes a plurality of controllers that receive and process an input and output request specifying any of a plurality of volumes from an external device, and a plurality of switches each having a plurality of ports. The plurality of controllers are connected in parallel to the plurality of switches and communicate with each other via the plurality of switches. Each of the plurality of controllers acquires a plurality of port identifiers identifying a plurality of connected ports from the connected switches, and determines a controller identifier in the storage system based on the acquired plurality of port identifiers.
MASSIVELY PARALLEL HIERARCHICAL CONTROL SYSTEM AND METHOD
The present disclosure relates to an electronic control system for controlling controllable elements of an external component. The system makes use of a state translator subsystem (“STS”) for receiving a state command from an external subsystem. The STS may have at least one module for processing the state command and generating operational commands over a first plurality of channels in parallel form, for controlling the elements of the external component. A programmable calibration command translation layer subsystem (“PCCTL”) is used and configured to receive and use the operational commands to generate granular level commands for controlling the elements, and to transmit the granular level commands over a second plurality of channels in parallel form. A subsystem is coupled between the PCCTL and the elements, and configured to receive the granular level commands from the PCCTL and to use the granular level commands to generate final output commands. The final output commands are applied in parallel, over a third plurality of channels, to the elements.
On-vehicle controller
A module driver or a master obtains the load IDs of the respective first loads connected to the downstream side of the module driver, recognizes the classification of areas, such as door, roof and floor areas, or a module according to the obtained load IDs, and allocates an appropriate driver ID to the module driver in each area. Each first load has a load ID. The load IDs are allocated to the respective second loads on the downstream side of the module driver on the basis of the allocated driver ID. The area or the module is recognized on the basis of the combination of the load IDs of the plurality of first loads, whereby malfunctions caused by erroneous assembling of the first loads are suppressed.