Access to a memory shared between a first interface and a second interface is arbitrated. Following a request to access the memory emanating from the second interface, while current access to the memory is granted to the first interface, a count is triggered having a maximum count time. A access to the memory is authorized for the second interface at the end of occupation of the access granted to the first interface if the end of occupation finishes before the end of the maximum count time, or otherwise at the end of the maximum count time.

A peripheral interface circuit and method is disclosed for dealing with round trip delay with serial memory. In some implementations, a finite state machine is configured to introduce a delay state prior to a read data state to absorb round trip delay associated with a memory read operation. A clock module is coupled to the finite state machine and configured to delay start of a pad return clock for the read operation until completion of the delay state. A first synchronous logic is coupled to receive the pad return clock and is configured to sample and hold data from a data bus during the read data state of the memory read operation based on the pad return clock. A second synchronous logic is coupled to receive a system clock and is configured to sample the held data based on the system clock.

The present disclosure relates generally to serial communication links and, more specifically, to events communicated on serial communication links and the timing of those events, for example, to achieve uniform delay among multiple event transmissions.

The present disclosure relates generally to serial communication links and, more specifically, to events communicated on serial communication links and the timing of those events, for example, to achieve uniform delay among multiple event transmissions.

A polling device driver is partitioned into a plurality of driver threads for controlling a device of a computer system. The device has a first device state of an unscouted state and a scouted state, and a second device state of an inactive state and an active state. A driver thread of the plurality of driver threads determines that the first device state of the device state is in the unscouted state, and changes the first state of the device to the scouted state. The driver thread further determines that the second device state of the device is in the inactive state and changes the second device state of the device to the active state. The driver thread executes an operation on the device during a pre-determined time slot configured for the driver thread.

A method of operating a memory controller, memory devices including a master memory device and slave memory devices, a back channel bus coupling the master memory device to the slave memory devices and a channel coupling the memory controller to the memory devices is provided as follows. A memory command is received by the memory devices from the memory controller. An internal command is generated and outputted by the master memory device. The internal command is received by the slave memory devices. The internal command is transmitted to the slave memory devices through the back channel bus.

A system, apparatus and method for efficient utilization of available band-width on the system's bus connection. The system includes a scheduler configured to receive a virtual schedule that provides at least one slot for sending a message over the communication bus. A module is configured to send a message over the communication bus.

Reducing power consumption of communication interfaces by clock frequency scaling and adaptive interleaving of polling is disclosed. In a first aspect, a control system controls transmission of a command via a serial interface at a higher clock frequency. After transmission, the control system and the interface are operated at a lower clock frequency to save power during command execution. In this aspect, a reduction in polling corresponds to the reduction in clock signal frequency. When the command is complete, the interface is operated at the higher frequency to send another command. In a second aspect, after the control system sends a command to the receiving device, polling is suspended and an execution time of the command is tracked. Polling begins when the tracked execution time almost equals an expected completion time. Both aspects disclosed above may be implemented to reduce power consumption in exchange for a small increase in latency.

The present disclosure relates to a communication apparatus, a communication method, a program, and a communication system that enable more reliable communication.

A bus IF is constituted by a master having an initiative of communication and a slave that communicates with the master under the control of the master. Additionally, the slave is provided with a detection unit that, when detecting a change in level of a signal line representing a declaration of initiation or end of communication by the master, outputs a detection signal indicating that the change in level of the signal line representing a declaration of initiation or end of communication has been detected, and a false detection avoidance unit that invalidates output of the detection signal during a specific time slot set in advance. The present technology can be applied to, for example, a bus IF that performs communication in conformity with the I3C standard.

The present disclosure relates generally to serial communication links and, more specifically, to events communicated on serial communication links and the timing of those events, for example, to achieve uniform delay among multiple event transmissions.