Patent classifications
G06F13/4022
NEGOTIATED BRIDGE ASSURANCE IN A STACKED CHASSIS
An information handling system includes multiple data ports, a memory, and a processor. Each of the data ports enables a separate communication link of a plurality of communication links for the information handling system. The memory stores data to indicate whether the information handling system supports bridge assurance on each of the communication links. In response to the bridge assurance being supported in the information handling system, the processor provides a message across a first link of the communication links. The message indicates that bridge assurance is supported in the information handling system. The processor also determines whether an acknowledgement message has been received. In response to the acknowledgement message being received, the processor enables the bridge assurance on the first link.
Communication Between Stacked Die
In a stacked integrated circuit device, there are two components, one in a first of the die and another in a second of the die. Each of the components is provided with two output connections, one leading above and one leading below the die, and two input connections, one leading above and one leading below the die, either of the two die. As a result of the redundancy, both die may be used in either position in the stacked structure. If either of the die is used as the top die, it sends data on its second output path and receives data on its second input path. On the other hand, when one of the die is used as the bottom die, it sends data on its first output path and receives data on its first input path. In this way, the same design may be used for the connections between each of the die.
TRANSMIT AND RECEIVE CHANNEL SWAP FOR INFORMATION HANDLING SYSTEMS,
An apparatus includes an interface with a plurality of channels; a multiplexer coupled to the interface and configured to couple transmit circuitry to a first channel mapped as a transmit path in a channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration; and a controller coupled to the multiplexer. The controller may be configured to perform the steps including determining a figure of merit of at least one channel of the plurality of channels of the interface; determining the channel configuration mapping transmit and receive paths to the plurality of the channels of the interface; and controlling the multiplexer to couple transmit circuitry to the first channel mapped as a transmit path in the channel configuration and to couple receive circuitry to the second channel mapped as a receive path in the channel configuration for dynamic channel swap(s).
DEVICE CONTROL APPARATUS AND CONTROL METHOD
According to one embodiment, a device control apparatus includes a communication interface connectable to several client terminals via a network and a local device interface connectable to several peripheral devices. The device control apparatus functions as registration unit configured to receive an occupation request for a peripheral device from a client terminal and then register the peripheral device for which the occupation request has been received as occupied by the client terminal if the peripheral device is not registered as occupied by another client terminal. A setting unit sets a release time for releasing the occupation of the registered peripheral device, and an update unit updates the release time whenever communication occurs between the registered peripheral device and the client terminal. A release unit releases the registered occupation of the peripheral device once the release time elapses.
Configurable accelerator framework including a stream switch having a plurality of unidirectional stream links
Embodiments are directed towards a configurable accelerator framework device that includes a stream switch and a plurality of convolution accelerators. The stream switch has a plurality of input ports and a plurality of output ports. Each of the input ports is configurable at run time to unidirectionally pass data to any one or more of the output ports via a stream link. Each one of the plurality of convolution accelerators is configurable at run time to unidirectionally receive input data via at least two of the plurality of stream switch output ports, and each one of the plurality of convolution accelerators is further configurable at run time to unidirectionally communicate output data via an input port of the stream switch.
CONTROLLER WHICH ADJUSTS CLOCK FREQUENCY BASED ON RECEIVED SYMBOL RATE
A system is disclosed that includes two or more network elements, each comprising a Precision Time Protocol (PTP) Hardware Clock (PHC) that is adjustable based, at least in part, on physical layer frequency information.
SYSTEMS, DEVICES AND METHODS WITH OFFLOAD PROCESSING DEVICES
A method can include receiving network packets including forwarding plane packets; evaluating header information of the network packets to map network packets to any of a plurality of destinations on the module, each destination corresponding to any of a plurality of services executed by offload processors of the module; configuring operations of the offload processors; and in response to forwarding plane packets, executing operations on the forwarding plane packets; wherein the receiving, evaluation and processing of the forwarding plane packets are performed independent of the host processor. Corresponding systems and methods are also disclosed.
DYNAMIC EQUALITY OF SERVICE IN A SWITCH NETWORK
A method comprises a Dynamic Equality of Service (DEoS) arbiter of a switch computing port DEoS metrics based on dynamic input activity of source nodes into input ports of the switch. Based on the port DEoS metrics, the arbiter selects an input port of the switch to make a through-connection to an output port of the switch. The port DEoS metrics can be based on node DEoS metrics including DEoS counters, and/or quantization ranges of DEoS counters, associated with the source nodes. A switching apparatus comprises a switch, a plurality of nodes coupled to the switch, and a DEoS arbiter. The switching apparatus can further comprise a first and second DEoS counter. The DEoS arbiter can perform operations of the method to arbitrate among input ports of the switch to make a through-connection.
Delaying layer 2 frame transmission
Datalink frames or networking packets contain protocol information in the header and optionally in the trailer of a frame or a packet. We are proposing a method in which part of or all of the protocol information corresponding to a frame or a packet is transmitted separately in another datalink frame. The “Separately Transmitted Protocol Information” is referred to as STPI. The STPI contains enough protocol information to identify the next hop node or port. STPI can be used avoid network congestion and improve link efficiency. Preferably, there will be one datalink frame or network packet corresponding to each STPI, containing the data and the rest of the protocol information and this frame/packet is referred to as DFoNP. The creation of STPI and DFoNP is done by the originator of the frame or packet such as an operating system.
Storage network with enhanced data access performance
A method for execution by a storage network begins by issuing a decode threshold number of read requests for a set of encoded data slices to a plurality of storage units of a set of storage units and continues by determining whether less than a decode threshold number of read requests has been received in a time window. The method continues by identifying one or more encoded data slices encoded data slices associated with read requests of the decode threshold number of read requests that have not been received and for an encoded data slice of the one or more encoded data slices, issuing a priority read request to a storage unit storing a copy of the encoded data slice. The method then continues by receiving a response from the storage unit storing the copy of the encoded data, where the storage unit storing the copy of the encoded data slice is adapted to delay one or more maintenance tasks in response to the priority read request.