A portable electronic instrument that has a connection port for inserting a connector and includes a built-in spring having a protrusion portion protruding in a lateral direction inside the connection port, a connector 10 has an insertion portion 12 which is inserted in the connection port 16 and includes connection members 31, 32 which respectively have hooking portions 23, 24 able to be hooked at the protrusion portions of the built-in springs inside a main body.

An apparatus includes a plurality of output ports and a processor. The output ports may each be configured to connect to a respective trigger device and generate an output signal to activate the respective trigger device. The processor may be configured to determine a number of the trigger devices connected to the output ports, determine a timing between each of the number of the trigger devices connected, convert the timing for each of the trigger devices to fit a standard timing using offset values specific to each of the trigger devices and perform a trigger routine to trigger the output signal for each of the trigger devices connected. The trigger routine may activate each of the trigger devices connected according to an event. The offset values may delay triggering the trigger devices to ensure that the trigger devices are sequentially activated at intervals that correspond consistently with the standard timing.

A storage device includes a non-volatile memory device, a memory controller, a secure element, and a wireless power received. The memory controller encrypts data using key information and stores the encrypted data in the non-volatile memory device, or reads the encrypted data from the non-volatile memory device, decrypts the read encrypted data using the key information, and outputs the decrypted data to an external device. The secure element stores the key information. The wireless power receiver, when the key information of the secure element is destroyed, receives wireless power from an external wireless device and provides the wireless power to the secure element.

Examples disclose a computing system comprising a host device with a connection socket to support multiple types of cables by detecting a first key position and a second key position for determination of the type of cable. Further, the computing system comprises a switching circuit to determine a logic state of each of the key positions. Additionally, the switching circuit is to deliver power associated with the type of cable based on the logic states of the key positions.

The devices within an inter-device processing system maintain data coherency in the last level caches of the system as a cache line of data is shared between the devices by utilizing a directory in one of the devices that tracks the coherency protocol states of the memory addresses in the last level caches of the system.

A daisy-chain storage synchronization (DSS) system and method that permits a daisy-chain of interconnected pass-thru disk drive controllers (PTDDCs) each connected to a SATA local disk drive (LDD) disk storage element (DSE) to support state synchronization within PTDDCs in the daisy-chain is disclosed. The PTDDCs within the daisy-chain are configured to individually maintain drive state information (DSI) relating to the LDD as well as chain state information (CSI) relating to the individual PTDDCs within the daisy-chain. This state information may be modified on receipt of out-of-band signaling (OBS) from other PTDDC elements up the daisy-chain as well as OBS from other PTDDC elements down the daisy-chain, CSI is determined in part by conventional SATA OBS state register protocols that are modified by internal state registers (ISR) in each individual PTDDC daisy-chain element so as to make the DSS transparent to existing SATA OBS single-disk standard hardware command protocols.

Embodiments may be generally direct to apparatuses, systems, method, and techniques to determine a configuration for a plurality of connectors, the configuration to associate a first interconnect protocol with a first subset of the plurality of connectors and a second interconnect protocol with a second subset of the plurality of connectors, the first interconnect protocol and the second interconnect protocol are different interconnect protocols and each comprising one of a serial link protocol, a coherent link protocol, and an accelerator link protocol, cause processing of data for communication via the first subset of the plurality of connectors in accordance with the first interconnect protocol, and cause processing of data for communication via the second subset of the plurality of connector in accordance with the second interconnect protocol.

A modular assembly of a module for a Logic Controller, including a container and a cartridge. The cartridge has a first electrical interface part and an electronic circuit arranged to provide a predetermined electronic function. The container has a housing, a backplane connector, a terminal connector and a receptacle extending inside the housing and adapted to receive the cartridge. The receptacle includes a second electrical interface part adapted to connect with the first electrical interface part. The cartridge and the receptacle are arranged to electrically connect the first and second electrical interface parts to establish an electrical interface when the cartridge is removably inserted in the receptacle of the container. The housing of the container defines the mechanical form factor of the module, while the cartridge determines the electronic functionality of the module. Accordingly, multiple containers having different form factors may accommodate the same cartridge.

A universal serial bus (USB) dongle device includes a USB interface for receiving a video signal in a first format and for sending a processed video signal in a second format wherein the first format differs from the second format. An encoding module generates the processed video signal based on the video signal. In a further embodiment, A video card includes a video receiver for receiving a video signal in a first format, based on a selection command. An encoding module generates a processed video signal in a second format based on the video signal, wherein the first format differs from the second format. A USB interface transfers the processed video signal to the host device, receives the selection command from the host device and receives a power signal from the host device to power the video receiver and the encoding module.

Dynamic lane management for interference mitigation is disclosed. In one aspect, an integrated circuit (IC) is provided that employs a control system configured to mitigate electromagnetic interference (EMI) caused by an aggressor communications bus. The control system is configured to receive information related to EMI conditions and adjust which lanes of the aggressor communications bus are employed for signal transmission. The IC includes an interface configured to couple to the aggressor communications bus. The interface is configured to transmit signals to and receive signals from the aggressor communications bus. The control system is configured to use the information related to the EMI conditions to assign signals to be transmitted via particular lanes of the aggressor communications bus to mitigate the EMI experienced by a victim receiver. The control system provides designers with an additional tool that may reduce the performance degradation of the victim receiver attributable to EMI.