The present disclosure provides a dual-edge triggered ring buffer and a communication system. The dual-edge triggered ring buffer includes a logic clock generation module and a data writing module. The logic clock generation module is configured to generate a corresponding first logic clock signal upon detecting an input of the trigger signal corresponding to the multiple first trigger signal input terminals, or to generate a corresponding second logic clock signal upon detecting an input of the trigger signal corresponding to the multiple second trigger signal input terminals. The data writing module is configured to write data output from the external system through the multiple corresponding input terminals according to the first logic clock signal or the second logic clock signal.

A peripheral module of a programmable controller and method for operating the peripheral module, wherein in a calibration mode a base voltage value is supplied by the peripheral module to a terminal via a switching device, the supply potential is changed at a start time by the peripheral module to the modified value and a response time at which the expected change occurs is acquired, and the valid time interval is ascertained by the peripheral module utilizing the start time and the response time.

The present disclosure includes apparatuses and methods related to memory module interfaces. A memory module, which may include volatile memory or nonvolatile memory, or both, may be configured to communicate with a host device via one interface and to communicate with another memory module using a different interface. Memory modules may thus be added or removed from a system without impacting a PCB-based bus to the host, and memory modules may communicate with one another without accessing a bus to the host. The host interface may be configured according to one protocol or standard, and other interfaces between memory modules may be configured according to other protocols or standards.

A peripheral module of a programmable controller and method for operating the peripheral module, wherein in a calibration mode a base voltage value is supplied by the peripheral module to a terminal via a switching device, the supply potential is changed at a start time by the peripheral module to the modified value and a response time at which the expected change occurs is acquired, and the valid time interval is ascertained by the peripheral module utilizing the start time and the response time.

Methods and systems for enumerating digital circuits in a system-on-a-chip (SOC) are disclosed. The method includes incrementing an enumeration value received from a previous enumerable instance to uniquely identify an immediately adjacent enumerable instance of a plurality of enumerable instances in a daisy chain configuration.

Methods and systems for enumerating digital circuits in a system-on-a-chip (SOC) are disclosed. The method includes incrementing an enumeration value received from a previous enumerable instance to uniquely identify an immediately adjacent enumerable instance of a plurality of enumerable instances in a daisy chain configuration.

A system and approach that may connect communication modules together in a daisy chain fashion as an expansion bus. A communication module may be connected with a data bus and a voltage bus to a baseboard having a controller. The communication module may have a multi-port universal serial bus hub connected to the data bus from the expansion connector, an electronic device connected to the hub and the voltage regulator. Another communication module having a similar structure as the first communication module may be connected to the first communication module via a data bus between the multiport hub of the first expansion module and a universal serial bus hub of the other communication module, and may have a voltage bus connected to the voltage bus of the first communication module. More communication modules may be connected in a daisy chain or serial fashion to a preceding module, and so on.

A system for sharing a data handling resource among a plurality of data producers. In some embodiments, the system includes: a data-handling resource, a first data generator, a first data connection, from the first data generator to the data-handling resource, a second data generator, a second data connection, from the second data generator to the first data generator, and a token-forwarding connection between the first data generator and the second data generator. The token-forwarding connection may be configured to transfer a token between the first data generator and the second data generator. The first data generator may be configured: to generate a first data stream, to receive a second data stream from the second data generator through the second data connection, and to send data selected from the first data stream and the second data stream.

A system and approach that may connect communication modules together in a daisy chain fashion as an expansion bus. A communication module may be connected with a data bus and a voltage bus to a baseboard having a controller. The communication module may have a multi-port universal serial bus hub connected to the data bus from the expansion connector, an electronic device connected to the hub and the voltage regulator. Another communication module having a similar structure as the first communication module may be connected to the first communication module via a data bus between the multiport hub of the first expansion module and a universal serial bus hub of the other communication module, and may have a voltage bus connected to the voltage bus of the first communication module. More communication modules may be connected in a daisy chain or serial fashion to a preceding module, and so on.

Supply of a first clock signal used in an interface part of each of a plurality of slave devices on a ring bus and a second clock signal used in a core part of each of the plurality of slave devices is controlled. The slave device as the target of a request issued from a master device is specified. The first clock signal is supplied to each of the plurality of slave devices and the second clock signal is supplied to the specified slaved device.