A storage device is provided to maintain a value of flow control credits allocated for a device on a channel and flow control logic is provided to receive a flow control signal over a link of an interconnect, the flow control signal indicating flow control credits allocated for the device on the channel. The flow control logic is further to update the value of flow control credits based on activity of the device on the channel.

According to an embodiment, a memory system includes a memory chip including a first terminal group used for data and a second terminal group used for a packet, and a memory controller configured to transmit and receive the data to and from the memory chip and transmit the packet to the memory chip. In a case where a transfer operation of the data is performed once, the memory controller transmits to the memory chip a first packet indicating a start of data transfer and a second packet indicating end of the data transfer. In a case where the transfer operation of the data is successively performed twice, the memory controller transmits to the memory chip the first packet corresponding to a second data transfer between a first data transfer and the second data transfer, and does not transmit the second packet corresponding to the first data transfer.