Patent classifications
G06F30/3308
System and method for simulating and analyzing quantum circuits
A system and method are provided to enable non-quantum experts to schematically represent, simulate and quantify the performance of physically realistic photonic quantum circuits. The framework offers the flexibility for users—not necessarily familiar with the fundamentals of quantum mechanics—to create circuits and work with simple inputs and outputs, while the complexities of manipulating high dimensionality quantum Hilbert spaces supporting photonic and physical quantum object states are handled with the use of purpose-built tools. The tools include a user-friendly method for defining classical photonic circuits which may be coupled to physical objects such as qubits, quantum input states, as well as classical and quantum measurement devices. The tools feature classical-to-quantum S-matrix conversion, quantum S-matrix extraction, as well as capabilities for defining and extracting quantum error parameters. The framework also supports extraction of post-measurement quantum states for use in subsequent circuits or simulators.
System and method for simulating and analyzing quantum circuits
A system and method are provided to enable non-quantum experts to schematically represent, simulate and quantify the performance of physically realistic photonic quantum circuits. The framework offers the flexibility for users—not necessarily familiar with the fundamentals of quantum mechanics—to create circuits and work with simple inputs and outputs, while the complexities of manipulating high dimensionality quantum Hilbert spaces supporting photonic and physical quantum object states are handled with the use of purpose-built tools. The tools include a user-friendly method for defining classical photonic circuits which may be coupled to physical objects such as qubits, quantum input states, as well as classical and quantum measurement devices. The tools feature classical-to-quantum S-matrix conversion, quantum S-matrix extraction, as well as capabilities for defining and extracting quantum error parameters. The framework also supports extraction of post-measurement quantum states for use in subsequent circuits or simulators.
Simulator and simulation method
Simulator includes a first core unit corresponding to the first simulation model, a second core unit corresponding to the second simulation model, a slave block unit for communicating with one of the first core unit and the second core unit, the first core unit and the second core unit and a simulation control unit for causing either to execute instructions. The first core unit includes a high-speed mode instruction execution control unit that stops executing subsequent instructions in response to a request for switching from the first simulation model to the second simulation model, and a transaction monitor unit that monitors whether or not the transaction processing between the first core unit and the slave block unit has been completed. The simulation control unit causes the second core unit to execute instructions in response to a notification of completion of the transaction processing from the transaction monitor unit.
Quantum state imaging for memory optimization
Apparatus and method for a full quantum state simulation. A quantum state simulation system may include a simulation configurator to map quantum register state data of a quantum processor at a first time to a representational data structure and generate a first quantum state image based on the representational data structure. The quantum state simulation system may also include a quantum state simulator to simulate the quantum register state data at a second time using the quantum register state data in the first quantum state image to update a second quantum state image, and store the first and second quantum state images to a data store.
Quantum state imaging for memory optimization
Apparatus and method for a full quantum state simulation. A quantum state simulation system may include a simulation configurator to map quantum register state data of a quantum processor at a first time to a representational data structure and generate a first quantum state image based on the representational data structure. The quantum state simulation system may also include a quantum state simulator to simulate the quantum register state data at a second time using the quantum register state data in the first quantum state image to update a second quantum state image, and store the first and second quantum state images to a data store.
Switching power aware driver resizing by considering net activity in buffering algorithm
A system includes one or more processors and a computer storage medium storing instructions that cause a machine to perform operations including accessing an integrated circuit (IC) design including an initial clock tree. The operations include selecting a first driver to evaluate for resizing, the first driver being a first size and having a first leakage current and determining a baseline power consumption measurement of clock tree based on the first size and the first leakage current of the first driver. The operations include identifying a plurality of replacement drivers to replace the first driver and determining a power consumption measurement for a second driver. Based on determining that the power consumption measurement for the second driver is less than the baseline power consumption measurement replacing the first driver with the second driver and generating a layout instance based on the second driver.
Switching power aware driver resizing by considering net activity in buffering algorithm
A system includes one or more processors and a computer storage medium storing instructions that cause a machine to perform operations including accessing an integrated circuit (IC) design including an initial clock tree. The operations include selecting a first driver to evaluate for resizing, the first driver being a first size and having a first leakage current and determining a baseline power consumption measurement of clock tree based on the first size and the first leakage current of the first driver. The operations include identifying a plurality of replacement drivers to replace the first driver and determining a power consumption measurement for a second driver. Based on determining that the power consumption measurement for the second driver is less than the baseline power consumption measurement replacing the first driver with the second driver and generating a layout instance based on the second driver.
FAST QUANTUM CIRCUIT SIMULATIONS WITH PARALLEL TASK-BASED TENSOR NETWORK CONTRACTION
A method includes receiving a representation of a quantum circuit at a processor and identifying multiple contraction trees based on the representation of the quantum circuit. Each of the contraction trees represents a tensor network from a set of tensor networks. A first subset of multiple tasks, from a set of tasks associated with the plurality of contraction trees, is assigned to a first set of at least one compute device having a first type. A second subset of multiple tasks mutually exclusive of the first subset of multiple tasks is assigned to a second set of at least one compute device having a second type different from the first type. The quantum circuit is simulated by executing the first subset of tasks via the first set of at least one compute device and executing the second subset of tasks via the second set of at least one compute device.
FAST QUANTUM CIRCUIT SIMULATIONS WITH PARALLEL TASK-BASED TENSOR NETWORK CONTRACTION
A method includes receiving a representation of a quantum circuit at a processor and identifying multiple contraction trees based on the representation of the quantum circuit. Each of the contraction trees represents a tensor network from a set of tensor networks. A first subset of multiple tasks, from a set of tasks associated with the plurality of contraction trees, is assigned to a first set of at least one compute device having a first type. A second subset of multiple tasks mutually exclusive of the first subset of multiple tasks is assigned to a second set of at least one compute device having a second type different from the first type. The quantum circuit is simulated by executing the first subset of tasks via the first set of at least one compute device and executing the second subset of tasks via the second set of at least one compute device.
MULTI-AGENT SIMULATION SYSTEM AND METHOD
The multi-agent simulation system includes a plurality of agent simulators provided for each of a plurality of agents and a center controller. The plurality of agent simulators simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchange of messages. The center controller relays transmission and reception of messages between the plurality of agent simulators. The plurality of agents include a plurality of types of agents including types having different time granularity. Each of the plurality of agent simulators transmits a message to the center controller at a transmission time interval corresponding to time granularity of a target agent to be simulated.