An A/D converter includes: a sampler that includes a sampling capacitor and samples an input signal; a D/A converter that selectively outputs an analog voltage; an integrator that integrates an input from the sampler and an input from the D/A converter; Multiple switches that include a first switch independently connecting the sampler to the integrator, a second switch independently connecting the D/A converter to the integrator, a third switch, and, a fourth switch, a quantizer that quantizes an output of the integrator; a control circuit that outputs a digital value based on an output of the quantizer, and a reference potential generation circuit that provides a second reference potential to an integrator side of the sampler through the third switch and provides a first reference potential to the integrator side of the D/A converter through the fourth switch.

An A/D converter includes: a sampler that includes a sampling capacitor and samples an input signal; a D/A converter that selectively outputs an analog voltage; an integrator that integrates an input from the sampler and an input from the D/A converter; Multiple switches that include a first switch independently connecting the sampler to the integrator, a second switch independently connecting the D/A converter to the integrator, a third switch, and, a fourth switch, a quantizer that quantizes an output of the integrator; a control circuit that outputs a digital value based on an output of the quantizer, and a reference potential generation circuit that provides a second reference potential to an integrator side of the sampler through the third switch and provides a first reference potential to the integrator side of the D/A converter through the fourth switch.

An integrator circuit includes: an operational amplifier; a first capacitor coupled to an input of the operational amplifier; a second capacitor coupled in parallel to the first capacitor so that a first terminal of the first capacitor is configured to be electrically coupled to a first terminal of the second capacitor by a first switch; and a second switch configured to electrically couple the first terminal of the second capacitor to a second terminal of the first capacitor.

An integrator circuit includes: an operational amplifier; a first capacitor coupled to an input of the operational amplifier; a second capacitor coupled in parallel to the first capacitor so that a first terminal of the first capacitor is configured to be electrically coupled to a first terminal of the second capacitor by a first switch; and a second switch configured to electrically couple the first terminal of the second capacitor to a second terminal of the first capacitor.

A switching regulator includes a switching element, a rectifier element, an output capacitor having one electrode connected to an output terminal, a control circuit which supplies a pulse width modulation signal in accordance with a voltage of the output terminal to a control terminal of the switching element, a load determination circuit which outputs a determination signal in accordance with a load, based on a voltage of the control terminal of the switching element, and a variable inductance circuit including a plurality of coils and having an inductance value which is switchable based on the determination signal.

A switching regulator includes a switching element, a rectifier element, an output capacitor having one electrode connected to an output terminal, a control circuit which supplies a pulse width modulation signal in accordance with a voltage of the output terminal to a control terminal of the switching element, a load determination circuit which outputs a determination signal in accordance with a load, based on a voltage of the control terminal of the switching element, and a variable inductance circuit including a plurality of coils and having an inductance value which is switchable based on the determination signal.

A physical quantity measurement device includes a sensor element having a coupling capacitance formed between a drive electrode and a detection electrode, and a circuit device having a drive circuit adapted to supply a drive signal to the drive electrode, a detection circuit adapted to detect physical quantity information corresponding to a physical quantity based on a detection signal from the detection electrode, and a fault diagnosis circuit, and the fault diagnosis circuit has an electrostatic leakage component extraction circuit adapted to extract an electrostatic leakage component due to the coupling capacitance from one of the detection signal and an amplified signal of the detection signal, and performs a fault diagnosis based on the electrostatic leakage component extracted.

A physical quantity measurement device includes a sensor element having a coupling capacitance formed between a drive electrode and a detection electrode, and a circuit device having a drive circuit adapted to supply a drive signal to the drive electrode, a detection circuit adapted to detect physical quantity information corresponding to a physical quantity based on a detection signal from the detection electrode, and a fault diagnosis circuit, and the fault diagnosis circuit has an electrostatic leakage component extraction circuit adapted to extract an electrostatic leakage component due to the coupling capacitance from one of the detection signal and an amplified signal of the detection signal, and performs a fault diagnosis based on the electrostatic leakage component extracted.

An amplification interface includes a drain of a first FET connected to a first node, a drain of a second FET connected to a second node, and sources of the first and second FETs connected to a third node. First and second bias-current generators are connected to the first and second nodes. A third FET is connected between the third node and a reference voltage. A regulation circuit drives the gate of the third FET to regulate the common mode of the voltage at the first node and the voltage at the second node to a desired value. A current generator applies a correction current to the first and/or second node. A differential current integrator has a first and second inputs connected to the second and first nodes. The integrator supplies a voltage representing the integral of the difference between the currents received at the second and first inputs.

An amplification interface includes a drain of a first FET connected to a first node, a drain of a second FET connected to a second node, and sources of the first and second FETs connected to a third node. First and second bias-current generators are connected to the first and second nodes. A third FET is connected between the third node and a reference voltage. A regulation circuit drives the gate of the third FET to regulate the common mode of the voltage at the first node and the voltage at the second node to a desired value. A current generator applies a correction current to the first and/or second node. A differential current integrator has a first and second inputs connected to the second and first nodes. The integrator supplies a voltage representing the integral of the difference between the currents received at the second and first inputs.