The present invention provides a gate driver on array (GOA) circuit, a display panel, and a threshold voltage compensating method for a thin film transistor (TFT). The GOA circuit only includes five TFTs and achieves a super narrow bezel of a display panel, and uses a dual-gate electrode structure as the first thin film transistor (T1). Therefore, a threshold voltage (Vth) in the GOA circuit is controlled by a top gate (the top gate connected to a node in the GOA circuit) and a bottom gate (adjustable voltage source (VLS)). Specifically, when the Vth of the TFT negatively shifts overall, the bottom gate voltage can be adjusted negatively. When the Vth of the TFT positively shifts, the bottom gate voltage can be adjusted negatively to stabilize the GOA circuit, increase a lifespan thereof, reduce leakage of a first node (Q) such that the GOA circuit can output ultra-wide pulse signals.

A display substrate and a manufacturing method, and a display device are provided. The display substrate includes a base substrate including a display region and a periphery region; and a shift register unit, a first power line and a second power line; an orthographic projection of the first power line on the base substrate is on a side of an orthographic projection of the shift register unit on the base substrate closer to the display region, an orthographic projection of the second power line on the base substrate is on a side of the orthographic projection of the shift register unit on the base substrate away from the display region, and the orthographic projection of the shift register unit on the base substrate is between the orthographic projection of the first power line on the base substrate and the orthographic projection of the second power line on the base substrate.

An organic light emitting diode display with improved aperture ratio includes: a substrate; first and second pixels disposed in a first row of the substrate and third and fourth pixels disposed in a second row adjacent to the first row and respectively disposed in the same columns as the first and second pixels; a scan line and a previous scan line applying a scan signal and a previous scan signal, respectively, to the pixel units; a data line and a driving voltage line applying a data signal and a driving voltage, respectively, to the pixel units; and a common initialization voltage line disposed between the first and second pixels and between the third and fourth pixels, commonly connected to the pixel units, and applying an initialization voltage. One common initialization contact hole connected to all pixels units and one initialization voltage line connected to the common initialization contact hole are surrounded by the pixel units.

The present disclosure provides a pixel circuit, its driving methods, an OLED display panel and a display device. The pixel circuit includes a driving controlling unit configured to, under the control of a first scanning signal and a second scanning signal, charge or discharge a first storage capacitor through a first level, a second level and a data voltage, so as to compensate for a threshold voltage of a driving transistor with a gate-to-source voltage of the driving transistor when an OLED is driven by the driving transistor to emit light; and a touch controlling unit including a touch sensor and configured to, under the control of the first scanning signal and the second scanning signal, sense by the touch sensor whether or not a touch is made and transmit a corresponding touch sensing signal to a touch signal reading line.

An organic light emitting display device includes a plurality of pixels each having a pixel driving circuit. Each of the pixels includes an organic light emitting diode and a driving TFT that controls driving of the organic light emitting diode and includes an active layer of low temperature poly-silicon, a gate node, a source node, and a drain node. The pixels include first to fifth switching TFTs electrically connected to the driving TFT and each including an active layer of an oxide semiconductor, a gate node, a source node, and a drain node. Further, the pixels include a storage capacitor connected between the gate node of the driving TFT and the source node of the fifth switching TFT and a coupling capacitor electrically connected in series to the storage capacitor and configured to cause capacitive coupling to supply a bootstrapped voltage to the gate node of the driving TFT.

According to an aspect of the present disclosure, an organic light emitting display device includes a plurality of pixels each including a pixel driving circuit. The plurality of pixels includes an organic light emitting diode and a driving TFT configured to control driving of the organic light emitting diode and including a gate node as a first node, a source node as a second node, and a drain node. Also, the plurality of pixels includes first to third switching TFTs electrically connected to the driving TFT and first and second storage capacitors configured to store a voltage to be applied to the driving TFT DT. Further, the plurality of pixels includes a coupling capacitor connected to a gate node of the third switching TFT so as to increase a voltage to be applied to the gate node of the driving TFT.

A display panel control method for a display panel. The display panel includes at least one common electrode line and a plurality of data lines. The method provides a timing control signal including an active interval and a vertical blanking interval. The timing control signal is used to make the display panel either enter the active interval or enter the vertical blanking interval to execute corresponding operation procedures. When the display panel is in the active interval, the method provides corresponding data voltage to every data line according to the image data. When the display panel is in the vertical blanking interval, the method provides a blanking data voltage to every data line. The blanking data voltage is determined according to the polarity of the corresponding data voltage of the corresponding data line and a common voltage of the at least one common electrode line.

A display apparatus includes a display panel having a plurality of gate lines, a plurality of data lines, and a plurality of subpixels. Each of the plurality of subpixels includes a subpixel electrode connected to one of the plurality of gate lines and one of the plurality of data lines through a switching element. A gate driver is configured to output a plurality of gate signals to the plurality of gate lines and to deactivate at least one of the plurality of gate signals in a P-th frame. A data driver is configured to output a plurality of data voltages to the plurality of data lines. Here, P is a positive integer.

A display substrate, a preparation method thereof, a display panel, and a display device are provided. The display substrate includes a base substrate and a repeating unit, the repeating unit includes a plurality of sub-pixels including a first sub-pixel and a second sub-pixel, a color of light emitted by a light-emitting element of the first sub-pixel is identical to a color of light emitted by a light-emitting element of the second sub-pixel, a shape of a first light-emitting voltage application electrode of the light-emitting element of the first sub-pixel is different from a shape of a first light-emitting voltage application electrode of the light-emitting element of the second sub-pixel.

A display panel and a display device are provided. The display panel includes: a display region and a peripheral region surrounding the display region. The display region comprises a first display sub-region and a second display sub-region. The width-to-length ratio of a channel region of an output transistor in a second gate shift register corresponding to the second display sub-region is decreased so as to reduce the charging time of pixels in the second display sub-region, so that the brightness of the pixels in the second display sub-region is consistent with the brightness region of pixels in the first display sub-region. The configuration facilitates achieving a narrow bezel while improving the display uniformness of the display panel without changing the existing circuit structure and occupying the additional bezel area.