G09G2310/021

PIXEL DRIVING CIRCUIT, DISPLAY PANEL AND DRIVING METHOD
20210150985 · 2021-05-20 ·

Provided are a pixel driving circuit, a display panel and a driving method. The pixel driving circuit includes a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal of the bias adjustment module is connected to the second terminal of the drive transistor.

Driving device and driving method of display panel
10984738 · 2021-04-20 · ·

This disclosure provides a driving device and a driving method of a display panel, wherein the display panel comprises a pixel array, and the driving device comprises: at least one first gate driving module disposed on one side of the pixel array and connected to odd-numbered rows of pixels of the pixel array for line-by-line driving the odd-numbered rows of pixels of the pixel array, and at least one second gate driving module disposed on another side of the pixel array and connected to even-numbered rows of pixels of the pixel array for performing the line-by-line driving on the even-numbered rows of pixels of the pixel array.

High frame rate display

A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

Display device and driving method thereof
11011090 · 2021-05-18 · ·

A display device and driving method thereof are provided. In the display device, a control circuit provides first and second start signals. In a display panel, a pixel array has a plurality of odd and even gate lines. A first and second gate circuits respectively receive the first and second start signals, and respectively provide the sequentially enabled first and second gate signals to odd and even gate lines according to the phases of the first and second start signals, respectively. One of the first and second start signals is phase-shifted by at least one clock cycle from a preset phase during a first scan period that scans from a first side to a second side of the pixel array or during a second scan period that scans from the second side to the first side of the pixel array.

Display device and electronic apparatus

A display device according to the present disclosure includes: pixels arranged in a matrix; a data line group that includes a pair of data lines for each pixel column; a data line drive circuit that supplies a positive-phase data signal to one of the pair of data lines, and a negative-phase data signal to the other of the pair of data lines; and an auxiliary drive circuit that is provided for each pair of data lines, and that processes the positive-phase data signal and the negative-phase data signal, in which the auxiliary drive circuit has a dead zone in a region where there is no difference between a positive-phase potential and a negative-phase potential, or where the difference in potential is smaller than a predetermined value. An electronic apparatus according to the present disclosure includes a display device having the configuration described above.

Active matrix substrate, display device, and drive method therefor

In a display device including an active matrix substrate in which a demultiplexing circuit is formed, a boost circuit, which generates a plurality of connection control signals respectively applied to gate terminals of a plurality of connection control transistors as switching elements configuring the demultiplexing circuit are respectively generated, is provided in the demultiplexing circuit. An internal node of each boost circuit is precharged via a transistor turned on by a boosted voltage of an internal node of another boost circuit, and thereafter, a voltage of the internal node of the boost circuit is boosted via a boost capacitor by a control signal applied to a demultiplexing circuit. The boosted voltage of the internal node is applied to a gate terminal of a connection control transistor as a connection control signal.

Organic light emitting diode display including an anode overlapping a voltage line

According to an exemplary embodiment, an organic light emitting diode display includes: a substrate; a semiconductor layer; a first gate insulating layer disposed on the oxide semiconductor layer; a first gate layer disposed on the first gate insulating layer; a first interlayer insulating layer disposed on the first gate layer; a first data layer disposed on the first interlayer insulating layer; a second interlayer insulating layer disposed on the first data layer; a driving voltage line and a driving low voltage line disposed on the second interlayer insulating layer and separated from each other; an upper insulating layer covering the driving voltage line and the driving low voltage line; and an anode disposed on the upper insulating layer and overlapping the driving voltage line or the driving low voltage line.

Split-screen driving of electronic device displays

Aspects of the subject technology relate to electronic device display circuitry and methods of operating the display. The display circuitry includes gate-in-panel (GIP) drivers for each pixel row of a pixel array, and mode selection circuitry coupled between two of the GIP drivers. The mode selection circuitry receives a select signal to switch the display between a full-screen mode of operation and a split-screen mode of operation. The mode selection circuitry allows the pixel rows to be operated in a butterfly driving mode that facilitates reduction of optical artifacts when displaying augmented-reality or virtual-reality content with a multi-function display such as a display of a smartphone or a tablet.

ACTIVE MATRIX SUBSTRATE, DISPLAY DEVICE, AND DRIVE METHOD THEREFOR

In a display device including an active matrix substrate in which a demultiplexing circuit is formed, a boost circuit, which generates a plurality of connection control signals respectively applied to gate terminals of a plurality of connection control transistors as switching elements configuring the demultiplexing circuit are respectively generated, is provided in the demultiplexing circuit. An internal node of each boost circuit is precharged via a transistor turned on by a boosted voltage of an internal node of another boost circuit, and thereafter, a voltage of the internal node of the boost circuit is boosted via a boost capacitor by a control signal applied to a demultiplexing circuit. The boosted voltage of the internal node is applied to a gate terminal of a connection control transistor as a connection control signal.

ORGANIC LIGHT EMITTING DIODE DISPLAY

According to an exemplary embodiment, an organic light emitting diode display includes: a substrate; a semiconductor layer; a first gate insulating layer disposed on the oxide semiconductor layer; a first gate layer disposed on the first gate insulating layer; a first interlayer insulating layer disposed on the first gate layer; a first data layer disposed on the first interlayer insulating layer; a second interlayer insulating layer disposed on the first data layer; a driving voltage line and a driving low voltage line disposed on the second interlayer insulating layer and separated from each other; an upper insulating layer covering the driving voltage line and the driving low voltage line; and an anode disposed on the upper insulating layer and overlapping the driving voltage line or the driving low voltage line.