As disclosed herein, a memory includes an array of resistive memory cells and a voltage regulator circuit that provides a regulated voltage based on a circuit with a replica resistive storage element. The regulated voltage is applied to a mux transistor of a multiplexer of a column decoder that is used to select a particular column line of a memory array from a set of column lines to provide the proper voltage to the memory cell during a write operation to the memory cell.

According to one embodiment, a semiconductor memory device includes a memory cell and a first circuit. The memory cell includes a variable resistance element. The first circuit performs writing for the memory cell. The first circuit starts writing first data before it receives write data including the first data and second data, and starts writing the second data after it receives the write data.

A storage device includes a memory cell array, a voltage detector disposed to detect a voltage of power supplied to the memory cell array, and a controller. The controller is configured to carry out reading of data from a target memory cell and then rewriting of the data in the target memory cell, if the detected voltage is above a threshold when a prompt of a read operation with respect to the target memory cell occurs, and prohibit the reading operation from being started, if the detected voltage is below the threshold when the prompt occurs.

An information processing apparatus includes a volatile memory, a nonvolatile memory, and a processor coupled to the volatile memory and the nonvolatile memory, the processor configured to make a selection of the volatile memory or the nonvolatile memory to be supplied power, based on a first difference between power consumption of the volatile memory and power consumption of the nonvolatile memory during standby, and a second difference between power consumption of the volatile memory and power consumption of the nonvolatile memory during an operation state, and switch between the volatile memory and the nonvolatile memory to be supplied power on the basis of the selection and whether the volatile memory or the nonvolatile memory being used currently by the processor.

A magnetic memory device includes a first magnetic memory device, a second magnetic memory device, a pulse power supplying current pulses to the first and second magnetic memory devices; and a switch configured to selectively connect the pulse power to one of the first and second magnetic memory devices. A resistance value of an MTJ device composed of the first fixed layer, the first non-magnetic layer, and the free layer is different from a resistance value of a MTJ device composed of the second fixed layer, the second non-magnetic layer, and the free layer.

Technology for limiting a voltage difference between two selected conductive lines in a cross-point array when using a forced current approach is disclosed. In one aspect, the selected word line voltage is clamped to a voltage limit while driving an access current through a region of the selected word line and through a region of the selected bit line. The access current flows through the memory cell to allow a sufficient voltage to successfully read or write the memory cell, while not placing undue stress on the memory cell. In some aspects, the maximum voltage that is permitted on the selected word line depends on the location of the selected memory cell in the cross-point memory array. This allows memory cells for which there is a larger IR drop to receive an adequate voltage, while not over-stressing memory cells for which there is a smaller IR drop.

Various embodiments of the present application are directed towards a memory cell, an integrated chip comprising a memory cell, and a method of operating a memory device. In some embodiments, the memory cell comprises a data-storage element having a variable resistance and a unipolar selector electrically coupled in series with the data-storage element. The memory cell is configured to be written by a writing voltage with a single polarity applying across the data-storage element and the unipolar selector.

The present invention relates to a semiconductor device. The semiconductor device based on the spin orbit torque (SOT) effect, according to an example of the present invention, comprises the first electrode; and the first cell and the second cell connected to the first electrode, wherein the first and the second cells are arranged on the first electrode separately; the magnetic tunnel junction (MTJ) having a free magnetic layer and a pinned magnetic layer with a dielectric layer in between them; the magnetization direction of the free magnetic layer is changed when the current applied on the first electrode exceeds critical current value of each cell; and the critical current value of the first cell is different from that of the second cell.

A memory device may include a substrate having conductivity regions and a channel region. A first voltage line may be arranged over the channel region. Second, third, and fourth voltage lines may each be electrically coupled to a conductivity region. Resistive units may be arranged between the third voltage line and the conductivity region electrically coupled to the third voltage line, and between the fourth voltage line and the conductivity region electrically coupled to the fourth voltage line. A resistance adjusting element may have at least a portion arranged between one of the resistive units and one of the conductivity regions. An amount of the resistance adjusting element between the first resistive unit and the conductivity region electrically coupled to the third voltage line may be different from that between the second resistive unit and the conductivity region electrically coupled to the fourth voltage line.

A method of operating a voltage-controlled magnetic anisotropy (VCMA) magnetic tunnel junction (MTJ) device is disclosed. The MTJ device is switchable between a first resistance state and a second resistance state. A first threshold voltage for switching the MTJ device from the second resistance state to the first resistance state is lower than a second threshold voltage for switching the MTJ device from the first resistance state to the second resistance state. The method includes applying a first voltage pulse across the MTJ device with an amplitude having an absolute value equal to or greater than the first threshold voltage and lower than the second threshold voltage, thereby setting the MTJ device to the first resistance state regardless of whether the MTJ device initially is in the first or second resistance state.