A method for testing systems on a chip during manufacture obtains basic function information of intellectual property cores and relevant information of network on chip and generates one or more test names according to the basic function information, and the relevant information of the network on chip. The method invokes a pre-prepared integral script to construct a running environment configured to invoke basic function scripts of to-be-tested intellectual property cores one by one, according to each of the test names which are generated. The method also generates the results of testing. A related electronic device and a non-transitory storage medium are also disclosed.

An equivalent time network analyzer and method estimates a device-under-test's frequency response by acquiring its time domain response through equivalent time over-sampling. The analyzer has a timing system producing two time bases differing in period by less than one part per million, resulting in a linearly varying phase difference. A high frequency stimulus generator, synchronized to the first time basis, creates a periodic waveform that contains energy at harmonics of the first time basis. An output capture cell that captures the response of the device-under-test includes a high bandwidth input comparator, a memory element clocked to the second time basis, and a low bandwidth feedback filter that provides a low frequency analog estimate of the time domain response of the device-under-test as feedback to the input comparator and as output from the capture cell. The analyzer may also include input capture cells, multiple stimulus generators, and/or multiple output capture cells.

A method for testing systems on a chip during manufacture obtains basic function information of intellectual property cores and relevant information of network on chip and generates one or more test names according to the basic function information, and the relevant information of the network on chip. The method invokes a pre-prepared integral script to construct a running environment configured to invoke basic function scripts of to-be-tested intellectual property cores one by one, according to each of the test names which are generated. The method also generates the results of testing. A related electronic device and a non-transitory storage medium are also disclosed.

A network on a chip (NoC) testing interface (NTI) includes a plurality of switches whose ports are coupled to respective endpoints. In one embodiment, the ports and endpoints are coupled to a shared bus that starts and terminates at a root device. The endpoints are assigned unique address which the NTI uses to select one of the endpoints so that test data is forwarded to a device under test (DUT) coupled to the endpoint. In one embodiment, the endpoints include selection logic for determining whether the endpoint has been selected, and if so, forwarding test data to the DUT. For example, if the endpoint receives a data vector on the bus which has an address that matches the unique address of the endpoint, the selection logic forwards the test data contained in subsequently received data vectors to the DUT until a different address is received.

An equivalent time network analyzer and method estimates a device-under-test's frequency response by acquiring its time domain response through equivalent time over-sampling. The analyzer has a timing system producing two time bases differing in period by less than one part per million, resulting in a linearly varying phase difference. A high frequency stimulus generator, synchronized to the first time basis, creates a periodic waveform that contains energy at harmonics of the first time basis. An output capture cell that captures the response of the device-under-test includes a high bandwidth input comparator, a memory element clocked to the second time basis, and a low bandwidth feedback filter that provides a low frequency analog estimate of the time domain response of the device-under-test as feedback to the input comparator and as output from the capture cell. The analyzer may also include input capture cells, multiple stimulus generators, and/or multiple output capture cells.

An apparatus configured to perform a network diagnosis procedure within a message-based protocol network comprising a plurality of nodes. The apparatus comprises: a diagnosis test device configured to perform diagnosis tests; and a diagnosis control device. In order to perform the network diagnosis procedure, the diagnosis control device is configured to: receive a diagnosis request from a commander node wherein the diagnosis request is directed to a target node, and wherein the diagnosis request comprises a first message identifier; compare the first message identifier to a predetermined diagnosis identifier; receive a diagnosis response from the target node, wherein the diagnosis response comprises a second message identifier and a test pattern; and compare the second message identifier to a predetermined diagnosis identifier; if the first message identifier and the second message identifier are identical to the predetermined diagnosis identifier: then use the diagnosis test device to perform a diagnosis test using the test pattern.