Patent classifications
G02B6/4257
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, a conductive structure and at least one via structure. The conductive structure is disposed on an upper surface of the semiconductor substrate. The at least one via structure is disposed in the semiconductor substrate. A portion of the at least one via structure extends beyond the conductive structure.
Chip-scale optical interconnect using microLEDs
In package intra-chip and/or inter-chip optical communications are provided using microLEDs and photodetectors mounted to integrated circuit (IC) chips and/or to transceiver dies associated with the IC chips. Light from the LEDs may pass through waveguides on or in a substrate to which the IC chips are mounted or which couple the IC chips.
Optical module
An object is to easily convey by suction an optical module equipped with optical fibers having ends coupled to optical receptacles and mount the optical module on a substrate. An optical module according to the present invention includes an optical device to which optical fibers having ends coupled to optical receptacles are optically coupled and also includes a carrier composed of a substrate and adhesive layers formed on the upper and lower surfaces of the substrate. The optical device is bonded on the adhesive layer formed on the lower surface of the substrate. Part of the optical fibers and the optical receptacles are bonded on the adhesive layer formed on the surface of the substrate.
PHOTONICS PACKAGE INTEGRATION
An interconnect package integrates a photonic die, an electronic die, and a switch ASIC into one package. At least some of the components in the electronic die, such as, for example, the serializer/deserializer circuits, transceivers, clocking circuitry, and/or control circuitry are integrated into the switch ASIC to produce an integrated switch ASIC. The photonic die is attached and electrically connected to the integrated switch ASIC.
PIC STRUCTURE HAVING BARRIER SURROUNDING OPENING FOR OPTICAL ELEMENT TO PREVENT STRESS DAMAGE
A photonic integrated circuit (PIC) structure includes an active region in at least an active layer over a substrate, the active region including a plurality of transistors therein. A plurality of dielectric interconnect layers are over the active region, and an opening is defined through the plurality of dielectric interconnect layers. The opening extends to at least the active layer. A barrier is within the plurality of dielectric interconnect layers and surrounding the opening. An optical element is positioned in the opening. The barrier prevents stress damage, such as cracks and/or delaminations, from propagating from or to the opening, and maintains the hermetic seal of the PIC structure.
CHIP-SCALE OPTICAL INTERCONNECT USING MICROLEDS
In package intra-chip and/or inter-chip optical communications are provided using microLEDs and photodetectors mounted to integrated circuit (IC) chips and/or to transceiver dies associated with the IC chips. Light from the LEDs may pass through waveguides on or in a substrate to which the IC chips are mounted or which couple the IC chips.
OPTICAL WAVEGUIDE PACKAGE AND LIGHT-EMITTING DEVICE
An optical waveguide package includes a substrate, an optical waveguide layer located on an upper surface of the substrate and including a cladding and a core in the cladding, a lid, and a metal member. The cladding includes a first surface facing the substrate, a second surface opposite to the first surface, and an element-receiving area being open in the second surface. The lid covers the element-receiving area. The metal member surrounds the element-receiving area between the cladding and the lid.
OPTICAL ELEMENT MODULE, SLIM CONNECTOR PLUG, ACTIVE OPTICAL CABLE ASSEMBLY USING SAME, AND MANUFACTURING METHOD THEREOF
Provided is an optical element module comprising: a mold body having a first surface formed on an upper portion thereof and a second surface formed on a lower portion thereof; an external connection terminal formed on the first surface and electrically connected to the outside; an optical engine embedded and sealed between the first surface and the second surface and having a connection pad exposed to the second surface; a conductive vertical via formed to penetrate the first surface and the second surface and having one end portion electrically connected to the external connection terminal; a wiring layer formed on the second surface to interconnect the other end of the conductive vertical via and the connection pad of the optical engine; and a reflective surface integrally formed on the wiring layer and transmits an optical signal generated by the optical engine or received by the optical engine.
SILICONIZED HETEROGENEOUS OPTICAL ENGINE
A siliconized heterogeneous optical engine. In some embodiments, the siliconized heterogeneous optical engine includes a photonic integrated circuit; an electro-optical chip, on a top surface of the photonic integrated circuit; an electronic integrated circuit, on the top surface of the photonic integrated circuit; an interposer, on the top surface of the photonic integrated circuit; a redistribution layer, on a top surface of the interposer, the redistribution layer including a plurality of conductive traces; and a plurality of protruding conductors, on the conductive traces of the redistribution layer. The electronic integrated circuit may be electrically connected to the electro-optical chip and to a conductive trace of the plurality of conductive traces of the redistribution layer.