An array substrate has a plurality of sub-pixel regions. The array substrate includes: a substrate; a first transistor and a second transistor that are disposed on a side of the substrate and located in each sub-pixel region; and a first pixel electrode and a second pixel electrode that are disposed on the side of the substrate and located in the sub-pixel region. The first pixel electrode and the second pixel electrode are insulated from each other; the first pixel electrode is electrically connected to the first transistor, and the second pixel electrode is electrically connected to the second transistor.

An electro-optic display having at least one row of display pixels, the display include a first display pixel of the at least one row of display pixels, the first display pixel coupled to a first bias line, and a second display pixel of the at least one row of display pixels, the second display pixel coupled to a second bias line, wherein the second bias line is different from the first bias line.

A display apparatus including a first substrate, a first electrode, a second substrate, a first microlens layer, a second microlens layer, a second electrode, a blocking wall structure, an electrophoresis medium, and multiple particles. The first electrode is disposed on the first substrate. The first microlens layer, having multiple first microlenses, is disposed on the second substrate. The second microlens layer, having multiple second microlenses, is disposed on the first microlens layer. The second electrode is disposed on the second microlens layer. The blocking wall structure is at least disposed between the first electrode and the second electrode and has an accommodating space corresponding to the first electrode. The electrophoresis medium is disposed in the accommodating space. The first microlens layer and the second microlens layer are disposed between the second substrate and at least a portion of the electrophoresis medium. The particles are mixed within the electrophoresis medium.

Color may be achieved in TIR-based image displays by addition of a sub-pixel color filter array (CFA). Color may be enhanced by tuning the size, shape, arrangement and colors of the sub-pixel color filters in the CFA. CFAs comprising of pixels further comprising one to four or more different repeating sub-pixel color filters may be capable of creating a wide gamut of displayable colors. The sub-pixels may be arranged in repeat cells wherein the sub-pixels within the repeat cell may be mapped to one or more pixels. Sub-pixel rendering may be used during driving of a TIR-based display. Sub-pixel rendering uses logical dynamic pixels where a single sub-pixel may be used in one or more pixels depending on the image displayed.

Color may be achieved in TIR-based image displays by addition of a sub-pixel color filter array (CFA). Color may be enhanced by tuning the size, shape, arrangement and colors of the sub-pixel color filters in the CFA. CFAs comprising of pixels further comprising one to four or more different repeating sub-pixel color filters may be capable of creating a wide gamut of displayable colors. The sub-pixels may be arranged in repeat cells wherein the sub-pixels within the repeat cell may be mapped to one or more pixels. Sub-pixel rendering may be used during driving of a TIR-based display. Sub-pixel rendering uses logical dynamic pixels where a single sub-pixel may be used in one or more pixels depending on the image displayed.

A method for driving an electro-optic display, the display having at least one display pixel coupled to a storage capacitor, the method include applying a waveform sequence to the at least one display pixel and connecting the storage capacitor to a first bias voltage, and maintaining a last frame voltage level on the display pixel after the completion of the applied waveform.

According to one embodiment, an electronic device includes scanning, signal, pixels, and an inspection circuit disposed in a non-display area and including first switch elements connected to the scanning lines, the first switch elements are oxide semiconductor transistors including an oxide semiconductor layer, and each of the first switch elements of the inspection circuit includes at least two transistors connected in series to one of the scanning lines.

According to one embodiment, an electronic device includes scanning, signal, pixels, and an inspection circuit disposed in a non-display area and including first switch elements connected to the scanning lines, the first switch elements are oxide semiconductor transistors including an oxide semiconductor layer, and each of the first switch elements of the inspection circuit includes at least two transistors connected in series to one of the scanning lines.

According to one embodiment, an array substrate includes a semiconductor layer, a first electrode in contact with the semiconductor layer, a second electrode separated from the first electrode and in contact with the semiconductor layer, a first insulating layer which covers the first electrode and the second electrode, a gate electrode disposed above the first insulating layer and opposing the semiconductor layer, and the semiconductor layer comprising an aperture located between the first electrode and the second electrode in plan view.

According to one embodiment, an array substrate includes a semiconductor layer, a first electrode in contact with the semiconductor layer, a second electrode separated from the first electrode and in contact with the semiconductor layer, a first insulating layer which covers the first electrode and the second electrode, a gate electrode disposed above the first insulating layer and opposing the semiconductor layer, and the semiconductor layer comprising an aperture located between the first electrode and the second electrode in plan view.