Embodiments of digital low-dropout (LDO) regulators and methods for operating a digital LDO regulator are described. In one embodiment, a digital LDO regulator includes a clamp circuit configured to generate a clamp voltage in response to an input voltage of the digital LDO regulator, a gate driver circuit configured to generate a drive voltage in response to the input voltage and the clamp voltage, and at least one transistor device configured to generate an output voltage in response to the input voltage and the drive voltage. Other embodiments are also described.

Embodiments of digital low-dropout (LDO) regulators and methods for operating a digital LDO regulator are described. In one embodiment, a digital LDO regulator includes a clamp circuit configured to generate a clamp voltage in response to an input voltage of the digital LDO regulator, a gate driver circuit configured to generate a drive voltage in response to the input voltage and the clamp voltage, and at least one transistor device configured to generate an output voltage in response to the input voltage and the drive voltage. Other embodiments are also described.

An AC-DC power conversion system provides extended voltage gain characteristic by virtue of controlling a duty cycle of operation associated with the desired input-to-output gain. The AC-DC power conversion system includes an AC-stage, first and second inductors, first and second voltage-doubler stages, a totem-pole rectifier stage, and a DC-stage coupled across the totem-pole rectifier stage. Each voltage-doubler stage includes a first terminal, a second terminal, and a third terminal, wherein a first terminal of the AC-stage is coupled by the first inductor to the first terminal of each voltage-doubler stage and by the second inductor to the third terminal of each voltage-doubler stage. The totem-pole rectifier stage includes first and second terminals coupled, respectively, to the second terminal of the first voltage-doubler stage and the second terminal of the second voltage-doubler stage.

An AC-DC power conversion system provides extended voltage gain characteristic by virtue of controlling a duty cycle of operation associated with the desired input-to-output gain. The AC-DC power conversion system includes an AC-stage, first and second inductors, first and second voltage-doubler stages, a totem-pole rectifier stage, and a DC-stage coupled across the totem-pole rectifier stage. Each voltage-doubler stage includes a first terminal, a second terminal, and a third terminal, wherein a first terminal of the AC-stage is coupled by the first inductor to the first terminal of each voltage-doubler stage and by the second inductor to the third terminal of each voltage-doubler stage. The totem-pole rectifier stage includes first and second terminals coupled, respectively, to the second terminal of the first voltage-doubler stage and the second terminal of the second voltage-doubler stage.

A power converter converts a medium-voltage output from a solar module to an appropriate voltage to power a solar tracker system. The power converter includes a voltage divider having at least two legs, a first semiconductor switch subassembly coupled in parallel with a first leg of the voltage divider, and a second semiconductor switch subassembly coupled in parallel with a second leg of the voltage divider. The power converter may be a unidirectional or a bidirectional power converter. In implementations, the signals for driving the semiconductor switches of the first and second semiconductor switch subassemblies may be shifted out of phase from each other. In implementations, if the bus voltages to the semiconductor switches are not balanced, the pulse width of the driving signal of the semiconductor switch supplied with the higher bus voltage is decreased for at least one cycle.

This disclosure relates to a digital comparator coupled to a pair of pull-up resistors and a pair of pull-down resistors whereby both pairs of resistors are coupled to an output terminal of a low dropout (LDO) regulator. In particular, the digital comparator comprises an edge detector module, a consecutive two-edge detector module and a consecutive three-edge detector module whereby the edge detector module is configured to receive two clock signals as inputs and after being processed by these three modules, to pull-up or pull-down the resistors at the output terminal of the LDO regulator based on the rising and falling edges of the received clock signals.

This disclosure relates to a digital comparator coupled to a pair of pull-up resistors and a pair of pull-down resistors whereby both pairs of resistors are coupled to an output terminal of a low dropout (LDO) regulator. In particular, the digital comparator comprises an edge detector module, a consecutive two-edge detector module and a consecutive three-edge detector module whereby the edge detector module is configured to receive two clock signals as inputs and after being processed by these three modules, to pull-up or pull-down the resistors at the output terminal of the LDO regulator based on the rising and falling edges of the received clock signals.

A voltage regulating circuit including a conversion circuit configured to convert a voltage pulse sequence into a filtered analog voltage, wherein the voltage pulse sequence represents a predefined operating limiting voltage, and a regulator configured to receive the filtered analog voltage as regulation variable and to regulate an output voltage of the voltage regulating circuit to a predefined desired voltage.

A reference voltage buffer circuit is provided, which could improve the reliability of the reference voltage buffer circuit, including: at least one output branch, where each output branch includes a delay control branch, a first MOSFET, and a second MOSFET; and a feedback branch, where in a first time period, the feedback branch is configured to output a first voltage to the delay control branch, and the delay control branch is configured to control the first MOSFET and the second MOSFET to be turned on, such that a source of the first MOSFET continuously outputs a reference voltage; and in a second time period, a voltage output from the feedback branch to the delay control branch is 0, the delay control branch is configured to control the second MOSFET to be turned off before the first MOSFET is turned off.

Circuits and devices related to switch controller. In some embodiments, a radio-frequency module can include a packaging substrate configured to receive a plurality of components, and a switching circuit implemented on the packaging substrate. The radio-frequency module can further include a control circuit configured to control operation of the switching circuit. The control circuit can include a regulator configured to generate a plurality of reference voltage levels for the operation of the switching circuit, or to be in a sleep mode, based on a control signal received through a common input node. The control circuit can further include a mode detector in communication with the regulator and configured to provide a first form of the control signal to the common input node to allow the plurality of reference levels to be generated by the regulator, or a second form of the control signal to the common input node to put the regulator in the sleep mode.