G05F3/20

Method and apparatus for generating a direct current bias

A voltage detector operates to detect a system power supply voltage and generate a trigger signal. A control signal generator responds to the trigger signal and generates a control signal. A DC bias generator responds to the control signal by generating a DC bias. The control signal controls the DC bias to have a first value when the power supply voltage is a first voltage and have a second value when the power supply voltage is a second voltage different from the first voltage, wherein the first value is different from the second value. A dynamic DC bias is generated which can not only support a larger voltage scope, but also significantly improves signal to noise ratio. The system power supply detection may concern stop/start operation of an automobile engine.

SELECTIVE PROTECTION CIRCUIT AND METHOD, AND POWER SUPPLY SYSTEM
20170346275 · 2017-11-30 ·

A selective protection circuit includes a current-limiting module and a control module, where the current-limiting module includes a switch unit, and the switch unit includes a first end, a second end, and a control end; the first end is connected to a positive electrode of a bus voltage of an HVDC power supply, and the second end is connected to a positive electrode of a power supply of a voltage pre-regulator circuit in a load branch connected to the current-limiting module; the control end is connected to the control module; and the control module is configured to output a control signal to the control end when a value of a total current flowing through the switch unit is greater than or equal to a preset threshold, so as to switch off the switch unit.

Back-bias optimization

Methods, systems, and devices for back-bias optimization are described. An apparatus, such as an electronic apparatus, may include a first substrate region and a second substrate region. The apparatus may also include a voltage generator that is disposed on the first substrate region and that includes an output terminal coupled with a conductive path. The apparatus may also include a set of clamp circuits disposed on the second substrate region. The set of clamp circuits may be configured selectively couple the conductive path with a voltage supply.

Low drop out compensation technique for reduced dynamic errors in digital-to-time converters

An apparatus comprises a radio frequency (RF) transceiver circuit; a phase modulator that comprises digital-to-time converter (DTC) circuitry configured to convert a digital value to a specified signal phase of a signal transmitted by the RF transceiver circuit; low drop out regulator (LDO) circuitry operatively coupled to the DTC circuitry, wherein a bias current of the LDO circuitry is adjustable; and logic circuitry operatively coupled to the LDO circuitry and DTC circuitry, wherein the logic circuitry is configured to set the adjustable bias current of the LDO circuitry according to a digital value input to the DTC circuitry.

Dynamic Biasing Techniques
20220057824 · 2022-02-24 ·

Various implementations described herein are related to a device having header circuitry with first transistors that are configured to receive a supply voltage and provide a dynamically biased voltage. The device may include reference generation circuitry having multiple amplifiers that are configured to receive the supply voltage and provide reference voltages based on the supply voltage. The device may include bias generation circuitry having second transistors configured to track changes in the dynamically biased voltage and adjust the dynamically biased voltage by generating bias voltages based on the reference voltages and by applying the bias voltages to the header circuitry so as to adjust the dynamically biased voltage.

CIRCUIT ARCHITECTURE FOR A MEASURING ARRANGEMENT, A LEVEL CONVERTER CIRCUIT, A CHARGE PUMP STAGE AND A CHARGE PUMP, AND METHOD FOR OPERATING SAME

In various embodiments, a measuring arrangement is provided. The measuring arrangement may include a micromechanical sensor including a capacitor, a bridge circuit including a plurality of capacitors, at least one capacitor of which is the capacitor of the micromechanical sensor, an amplifier coupled, on the input side, to an output of the bridge circuit, a DC voltage source configured to provide an electrical DC voltage, a chopper including at least one first charge store and a switch structure, The switch structure is configured to couple the first charge store alternately to the DC voltage and the bridge circuit for the purpose of coupling an electrical mixed voltage into the bridge circuit.

Small-circuit-scale reference voltage generating circuit

A reference voltage generating circuit including a bandgap reference circuit generating a bandgap reference voltage, and a filter circuit smoothing the bandgap reference voltage. The bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level. The filter circuit includes a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle, a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle, a third capacitive element charged with the bandgap reference voltage, and a fourth capacitive element.

Small-circuit-scale reference voltage generating circuit

A reference voltage generating circuit including a bandgap reference circuit generating a bandgap reference voltage, and a filter circuit smoothing the bandgap reference voltage. The bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level. The filter circuit includes a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle, a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle, a third capacitive element charged with the bandgap reference voltage, and a fourth capacitive element.

Semiconductor device including a constant voltage generation unit

A semiconductor device includes: a voltage generation unit that generates a first voltage having a first temperature characteristic; a constant voltage generation unit that generates a constant voltage; and an adjustment unit that generates a second voltage having a second temperature characteristic and a third voltage having a third temperature characteristic using the first voltage and the constant voltage. The constant voltage generation unit generates the constant voltage independently of the adjustment unit. One of the second and third temperature characteristics is an opposite characteristic to the first temperature characteristic. The device can also include a control unit that selects one of the second and third voltages in response to a predetermined setting value.

Semiconductor device including a constant voltage generation unit

A semiconductor device includes: a voltage generation unit that generates a first voltage having a first temperature characteristic; a constant voltage generation unit that generates a constant voltage; and an adjustment unit that generates a second voltage having a second temperature characteristic and a third voltage having a third temperature characteristic using the first voltage and the constant voltage. The constant voltage generation unit generates the constant voltage independently of the adjustment unit. One of the second and third temperature characteristics is an opposite characteristic to the first temperature characteristic. The device can also include a control unit that selects one of the second and third voltages in response to a predetermined setting value.