A power supply control unit controls supply and stoppage of power to a plurality of blocks having two or more modules. A clock control unit controls supply and stoppage of clocks to the two or more modules in the plurality of blocks. A first control unit verifies validity of a program stored in a storage unit. A second control unit executes the program determined to be valid as a result of verification by the first control unit. While the program is verified by the first control unit, the power supply control unit supplies power to a block including a module required for the verification, and the clock control unit stops a clock to a module not required for the verification of the block including a module required for the verification.

A battery pack is provided that can better manage peak current of in a converged portable radio. The battery pack comprises an internal Li-Ion cell stack characterized by a linear output voltage curve. A DC-DC converter converts the internal cell stack voltage to a desired DC-DC converter output voltage. The output voltage and current sourcing capability of the battery pack remain constant over the full cell discharge curve. The battery pack optimizes cell utilization, without the use of any internal microprocessor, thereby supporting the operation of simultaneous high peak current application features associated with LMR and LTE.

A battery pack is provided that can better manage peak current of in a converged portable radio. The battery pack comprises an internal Li-Ion cell stack characterized by a linear output voltage curve. A DC-DC converter converts the internal cell stack voltage to a desired DC-DC converter output voltage. The output voltage and current sourcing capability of the battery pack remain constant over the full cell discharge curve. The battery pack optimizes cell utilization, without the use of any internal microprocessor, thereby supporting the operation of simultaneous high peak current application features associated with LMR and LTE.

The present embodiment relates to a touch power management circuit and a touch driving system including the same, and more particularly, to a touch power management circuit that prevents unnecessary power consumption during a pen touch driving period in order to reduce power consumption of a display device, and a touch driving system including the same.

A line module for use in a network device a plurality of circuits; and a power module comprising at least one circuit, wherein the power module is connected to the plurality of circuits and a Power Distribution Unit (PDU), and the at least one circuit of the power module is configured to shut down one or more of the plurality of circuits until a current threshold is no longer exceeded by a current drawn from a power feed connected to the first PDU.

A line module for use in a network device a plurality of circuits; and a power module comprising at least one circuit, wherein the power module is connected to the plurality of circuits and a Power Distribution Unit (PDU), and the at least one circuit of the power module is configured to shut down one or more of the plurality of circuits until a current threshold is no longer exceeded by a current drawn from a power feed connected to the first PDU.

A power regulation and control method, apparatus and device, and a readable storage medium. The method disclosed in the present application includes: in response to a node power value of an artificial intelligence (AI) computing node being greater than a warning power value, acquiring, by a baseboard management controller (BMC), chip power values of computing chips in the AI computing node; obtaining a grouping result by grouping, according to the chip power values of the computing chips, the computing chips; and in response to the node power value being greater than a power capping value, querying a power regulation and control policy corresponding to the grouping result, and regulating power limit values of the computing chips according to the power regulation and control policy, such that a sum of all the power limit values is in a target range, where the warning power value is less than the power capping value, the power regulation and control policy is preset on the basis of the target range, and the target range is used for regulating and controlling energy efficiency values of the computing chips in the AI computing node.

Exemplary embodiments provide thermal wear spreading among a plurality of thermal die regions in an integrated circuit or among dies by using die region wear-out data that represents a cumulative amount of time each of a number of thermal die regions in one or more dies has spent at a particular temperature level. In one example, die region wear-out data is stored in persistent memory and is accrued over a life of each respective thermal region so that a long term monitoring of temperature levels in the various die regions is used to spread thermal wear among the thermal die regions. In one example, spreading thermal wear is done by controlling task execution such as thread execution among one or more processing cores, dies and/or data access operations for a memory.

A power-subsystem-monitoring-based computing system includes a power subsystem coupled to a first computing component. A throttling engine throttles the first computing component when the power subsystem exceeds its maximum power consumption, and de-throttles the first computing component when the power subsystem no longer exceeds its maximum power consumption. The throttling engine also throttles the first computing component when the power subsystem exceeds its rated power consumption for a first time period, and de-throttles the first computing component when the power subsystem no longer exceeds its rated power consumption. The throttling engine also reduces the operating capabilities of the first computing component when throttling has been performed for more than a second time period, and increases the operating capabilities of the first computing component when the throttling has been performed for less than the second time period and the first computing component is operating below its desired operating capability.

An eyewear device that includes a plurality of SoCs that share processing workload, and a USB port configured to perform low-power debugging and automation of the plurality of SoCs, such as using either a Universal Asynchronous Receiver-Transmitter (UART) or a Serial Wire Debug (SWD). The eyewear includes a USB hub configured such that the USB port can simultaneously communicate with the plurality of SoCs. The USB hub can be shut down to disable the USB hub, and all the SoCs can enter their low-power modes without being kept awake by a persistent USB connection. The eyewear includes a first switch and a control logic, wherein the control logic controls the first switch and enables the USB port to perform low-power debugging and automation of the SoCs. The eyewear further includes a second switch, wherein the control logic controls the second switch to enable the USB port to perform low-power debugging and automation of the SoCs via a processor, or to enable the USB port to control each of the SoCs.