Embodiments include an apparatus comprising an execution unit coupled to a memory, a microcode controller, and a hardware controller. The microcode controller is to identify a global power and performance hint in an instruction stream that includes first and second instruction phases to be executed in parallel, identify a local hint based on synchronization dependence in the first instruction phase, and use the first local hint to balance power consumption between the execution unit and the memory during parallel executions of the first and second instruction phases. The hardware controller is to use the global hint to determine an appropriate voltage level of a compute voltage and a frequency of a compute clock signal for the execution unit during the parallel executions of the first and second instruction phases. The first local hint includes a processing rate for the first instruction phase or an indication of the processing rate.

Examples herein relate to assigning, by a system agent of a central processing unit (CPU), an operating frequency to a core group based priority level of the core group while avoiding throttling of the system agent. Avoiding throttling of the system agent can include maintaining a minimum performance level of the system agent. A minimum performance level of the system agent can be based on a minimum operating frequency. Assigning, by a system agent of a central processing unit, an operating frequency to a core group based priority level of the core group while avoiding throttling of the system agent can avoid a thermal limit of the CPU. Avoiding thermal limit of the CPU can include adjusting the operating frequency to the core group to avoid performance indicators of the CPU. A performance indicator can indicate CPU utilization corresponds to Thermal Design Point (TDP).

Examples herein relate to assigning, by a system agent of a central processing unit (CPU), an operating frequency to a core group based priority level of the core group while avoiding throttling of the system agent. Avoiding throttling of the system agent can include maintaining a minimum performance level of the system agent. A minimum performance level of the system agent can be based on a minimum operating frequency. Assigning, by a system agent of a central processing unit, an operating frequency to a core group based priority level of the core group while avoiding throttling of the system agent can avoid a thermal limit of the CPU. Avoiding thermal limit of the CPU can include adjusting the operating frequency to the core group to avoid performance indicators of the CPU. A performance indicator can indicate CPU utilization corresponds to Thermal Design Point (TDP).

A receiver detection system includes a media access control (MAC) circuit, a common-mode voltage detector, and a receiver detector. The common-mode voltage detector is configured to detect whether a common-mode voltage satisfies a voltage condition, and to send a ready signal to the receiver detector after the common-mode voltage satisfies the voltage condition. The receiver detector is configured to start a detection process according to the ready signal and a detection start signal from the MAC circuit. In the detection process, the receiver detector sends out a detection signal for detecting whether a receiver exists, and then outputs a detection result to the MAC circuit, wherein the detection result indicates whether the receiver exists. The receiver detection system can prevent the receiver detector from starting the detection process before the common-mode voltage satisfies the voltage condition.

A receiver detection system includes a media access control (MAC) circuit, a common-mode voltage detector, and a receiver detector. The common-mode voltage detector is configured to detect whether a common-mode voltage satisfies a voltage condition, and to send a ready signal to the receiver detector after the common-mode voltage satisfies the voltage condition. The receiver detector is configured to start a detection process according to the ready signal and a detection start signal from the MAC circuit. In the detection process, the receiver detector sends out a detection signal for detecting whether a receiver exists, and then outputs a detection result to the MAC circuit, wherein the detection result indicates whether the receiver exists. The receiver detection system can prevent the receiver detector from starting the detection process before the common-mode voltage satisfies the voltage condition.

The technology described herein is directed towards optimizing power consumption of devices, e.g., in a datacenter. A modified (two-tier) genetic algorithm performs a carbon footprint-based optimization in a first tier to determine a candidate range of coefficients for each device type, e.g., servers, switches and storage devices/systems that likely reduce carbon footprint of each device type. In a second tier of the genetic algorithm, those ranges of coefficients are used in conjunction with actual power usage-based carbon footprint scores of individual devices to find respective sets of coefficients that minimize respective objective functions for the servers, the switches and the storage devices. The sets of coefficients can be used for power capping the devices. Device performance constraint-based intelligent selection can be used in one or both tiers to speed up convergence.

The technology described herein is directed towards optimizing power consumption of devices, e.g., in a datacenter. A modified (two-tier) genetic algorithm performs a carbon footprint-based optimization in a first tier to determine a candidate range of coefficients for each device type, e.g., servers, switches and storage devices/systems that likely reduce carbon footprint of each device type. In a second tier of the genetic algorithm, those ranges of coefficients are used in conjunction with actual power usage-based carbon footprint scores of individual devices to find respective sets of coefficients that minimize respective objective functions for the servers, the switches and the storage devices. The sets of coefficients can be used for power capping the devices. Device performance constraint-based intelligent selection can be used in one or both tiers to speed up convergence.

Disclosed are self-checkout terminals and systems and methods for controlling the same. The systems and methods may include receiving a first image of the customer queuing area from the first camera and determining that a customer is in the customer queuing area. A first wakeup signal may be transmitted to one of the self-checkout terminals when the customer is in the customer queuing area. A second image of the customer queuing area may be received from the first camera and a determination may be made that the customer queuing area is void of customers. A first sleep signal may be transmitted to the one of the self-checkout terminals when the customer queuing area is void of the customers.

Disclosed are self-checkout terminals and systems and methods for controlling the same. The systems and methods may include receiving a first image of the customer queuing area from the first camera and determining that a customer is in the customer queuing area. A first wakeup signal may be transmitted to one of the self-checkout terminals when the customer is in the customer queuing area. A second image of the customer queuing area may be received from the first camera and a determination may be made that the customer queuing area is void of customers. A first sleep signal may be transmitted to the one of the self-checkout terminals when the customer queuing area is void of the customers.

An example method includes detecting an event in an electronic system. The electronic system includes an electronic component and a switched mode power supply. The electronic component draws an amount of power from the switched mode power supply during operation. In response to detecting the event, the electronic component is operated to cause the electronic component to change the amount of power that the electronic component draws from the switched mode power supply. The change in the amount of power that the electronic component draws causes the switched mode power supply to output a signal that is evidence of the event.