Patent classifications
G06F9/4843
ENVOY FOR MULTI-TENANT COMPUTE INFRASTRUCTURE
A data management and storage (DMS) cluster of peer DMS nodes manages data of a tenant of a multi-tenant compute infrastructure. The compute infrastructure includes an envoy connecting the DMS cluster to virtual machines of the tenant executing on the compute infrastructure. The envoy provides the DMS cluster with access to the virtual tenant network and the virtual machines of the tenant connected via the virtual tenant network for DMS services such as data fetch jobs to generate snapshots of the virtual machines. The envoy sends the snapshot from the virtual machine to a peer DMS node via the connection for storage within the DMS cluster. The envoy provides the DMS cluster with secure access to authorized tenants of the compute infrastructure while maintaining data isolation of tenants within the compute infrastructure.
Dynamic graphical processing unit register allocation
Systems, apparatuses, and methods for dynamic graphics processing unit (GPU) register allocation are disclosed. A GPU includes at least a plurality of compute units (CUs), a control unit, and a plurality of registers for each CU. If a new wavefront requests more registers than are currently available on the CU, the control unit spills registers associated with stack frames at the bottom of a stack since they will not likely be used in the near future. The control unit has complete flexibility determining how many registers to spill based on dynamic demands and can prefetch the upcoming necessary fills without software involvement. Effectively, the control unit manages the physical register file as a cache. This allows younger workgroups to be dynamically descheduled so that older workgroups can allocate additional registers when needed to ensure improved fairness and better forward progress guarantees.
Method for managing multiple operating systems in a terminal
The disclosure provides a method for managing multiple operating systems in a terminal. The terminal includes multiple operating systems and a management system. The management system is configured to manage the multiple operating systems. The management system includes a cross-system application database. The method includes: when a first operating system in the multiple operating systems runs in a foreground, and a second operating system in the multiple operating systems runs in a background, if the second operating system receives a first message of a first application in the second operating system, sending, by the second operating system, a notification message to the management system; storing, by the management system, the notification message into the cross-system application database; and listening, by the first operating system, on the cross-system application database, and outputting a prompt of the first message when listening and obtaining the notification message.
Method and system for performing parallel computations to generate multiple output feature maps
Systems and methods for performing parallel computation are disclosed. The system can include: a task manager; and a plurality of cores coupled with the task manager and configured to respectively perform a set of parallel computation tasks based on instructions from the task manager, wherein each of the plurality of cores further comprises: a processing unit configured to generate a first output feature map corresponding to a first computation task among the set of parallel computation tasks; an interface configured to receive one or more instructions from the task manager to collect external output feature maps corresponding to the set of parallel computation tasks from other cores of the plurality of cores; a reduction unit configured to generate a reduced feature map based on the first output feature map and received external output feature maps.
Apparatus and method for performing multi-tasking in portable terminal
A multi-tasking execution apparatus and a method for easily controlling applications running in a portable terminal are provided. The apparatus includes a display and a controller. The display displays an application-containing image in which at least one specific image representing at least one application running in a background is contained and arranged. The controller operatively displays at least one specific image representing at least one application running in the background, so as to be contained in the application-containing image, and controls the at least one application running in the background by controlling the specific image based on a specific gesture.
Automation system and method
A computer-implemented method, computer program product and computing system for receiving a complex task; processing the complex task to define a plurality of discrete tasks each having a discrete goal; executing the plurality of discrete tasks on a plurality of machine-accessible public computing platforms; determining if any of the plurality of discrete tasks failed to achieve its discrete goal; and if a specific discrete task failed to achieve its discrete goal, defining a substitute discrete task having a substitute discrete goal.
Technologies for providing shared memory for accelerator sleds
Technologies for providing shared memory for accelerator sleds includes an accelerator sled to receive, with a memory controller, a memory access request from an accelerator device to access a region of memory. The request is to identify the region of memory with a logical address. Additionally, the accelerator sled is to determine from a map of logical addresses and associated physical address, the physical address associated with the region of memory. In addition, the accelerator sled is to route the memory access request to a memory device associated with the determined physical address.
SYSTEM AND METHOD FOR BATCH AND SCHEDULER MIGRATION IN AN APPLICATION ENVIRONMENT MIGRATION
A method of batch and scheduler migration assesses a batch job, scans it's scheduling mechanism and components, ascertains a quantum change for migrating the batch job to a target batch service and forecasts an assessment statistic that provides at least one functional readiness and a timeline to complete the migration of the batch job. The method generates a transformed batch job structure by breaking the batch job according to the target batch service while retaining the scheduling mechanism. Further, it updates containerized batch service components of the target batch service as per the forecasted assessment statistic and the transformed batch job structure, and migrates the batch job to the target batch service by re-platforming the updated containerized batch service components.
OFFLOADING PROCESSING TASKS TO DECOUPLED ACCELERATORS FOR INCREASING PERFORMANCE IN A SYSTEM ON A CHIP
In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups, and per memory bank load caching capabilities. In addition, decoupled accelerators may be used to offload VPU processing tasks to increase throughput and performance, and a hardware sequencer may be included in a DMA system to reduce programming complexity of the VPU and the DMA system. The DMA and VPU may execute a VPU configuration mode that allows the VPU and DMA to operate without a processing controller for performing dynamic region based data movement operations.
ACCESSING TOPOLOGICAL MAPPING OF CORES
A method, computer program product, and system include a processor(s) issues an instruction that includes processing core information that includes locations of processing cores of the computing system (logical cores and/or physical cores), and an operator selection. The processor(s) sets security parameters for information returned by the instruction which is topological information for mapping of the logical cores to the physical cores. The processor(s) obtains the topological information and utilizes an operating system to map the logical cores to the physical cores.