G06F13/405

Intra-chassis device multi-management domain system
11775465 · 2023-10-03 · ·

An intra-chassis device multi-management domain system includes a chassis housing a host processing system connected to first device(s), a secondary processing system connected to second device(s), and a management system connected to the first and second device(s). The management system may receive a first request for management access including first management domain access credentials, determine that the first management domain access credentials allow first access to a host domain associated with the host processing system and, in response, provide the first access to the first device(s) connected to the host processing system. The management system may also receive a second request for management access that includes second management domain access credentials, determine that the second management domain access credentials allow second access to a secondary domain associated with the secondary processing system and, in response, provide the second access to the second device(s) connected to the secondary processing system.

LIN communication circuit and a method of communicating between LIN busses

In aspects, a Local Interconnect Network (LIN) communication circuit including a first LIN master associated with a first LIN bus and a second LIN master associated with a second LIN bus is disclosed. A data link is connected between the first and second LIN masters. A first mirroring client is established at the first LIN master for receiving message bits corresponding to a LIN message in a first slot on the first LIN bus and for transmitting the message bits bitwise over the data link. A second mirroring client is established at the second LIN master for receiving the message bits and transmitting them over the second LIN bus. The first and second LIN masters include synchronised schedule tables such that the message bits on the second LIN bus are transmitted in a corresponding slot to the first.

Method for operating a communications network, communications network, and users for same

A method for operating a communications network that includes at least two users that are communicatively connected to one another via a descriptor-based communication system such as Ethernet. For writing data from a writing user into a user to be written, receive descriptors and data are transmitted from the writing user to the user to be written, in the user to be written, the data being written according to the received receive descriptors, and/or for reading data by a reading user from a user to be read, transmit descriptors are transmitted from the reading user to the user to be read, data being read by the user to be read according to the received transmit descriptors and transmitted to the reading user. A communications network and users are also described.

Memory controller for strobe-based memory systems

An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.

TIMING DETECTION AND CORRECTION METHOD FOR A SLAVE DEVICE IN AN IO-LINK COMMUNICATION AND SLAVE DEVICE OF AN IO-LINK COMMUNICATION

A slave device for IO-Link communication with a master device, wherein the master device and the slave device operate on a common basic timing, the slave device including at least one Universal Asynchronous Receiver Transmitter (UART) module configured to detect an INIT request sent from the master device during communication setup, calculate an actual timing of the master device from the INIT request and correct an initial timing of the slave device to an actual timing of the slave device based on the actual timing of the master device.

SYNCHRONIZATION CONTROL METHOD, CHIP, ELECTRONIC DEVICE AND STORAGE MEDIUM
20220300444 · 2022-09-22 ·

Provided are a synchronization control method, a chip, an electronic device and a storage medium. A master device sets a reference time for a plurality of slave devices wirelessly connected to the master device; and determines a target count value K of a connection event and an offset time of a respective slave device for each of the plurality of slave devices. The master device transmits the target count value of the connection event and the offset time to the respective slave device, so that each of the plurality of slave devices performs control based on the target count value of the connection event and the offset time of the respective slave device, so as to perform a task at the reference time.

METHOD FOR OPERATING A COMMUNICATIONS NETWORK, COMMUNICATIONS NETWORK, AND USERS FOR SAME
20220269631 · 2022-08-25 ·

A method for operating a communications network that includes at least two users that are communicatively connected to one another via a descriptor-based communication system such as Ethernet. For writing data from a writing user into a user to be written, receive descriptors and data are transmitted from the writing user to the user to be written, in the user to be written, the data being written according to the received receive descriptors, and/or for reading data by a reading user from a user to be read, transmit descriptors are transmitted from the reading user to the user to be read, data being read by the user to be read according to the received transmit descriptors and transmitted to the reading user. A communications network and users are also described.

Extending multichip package link off package

An interconnect interface is provided to enable communication with an off-package device over a link including a plurality of lanes. Logic of the interconnect interface includes receiver logic to receive a valid signal from the off-package device on a dedicated valid lane of the link indicating that data is to arrive on a plurality of dedicated data lanes in the plurality of lanes, receive the data on the data lanes from the off-package device sampled based on arrival of the valid signal, and receive a stream signal from the off-package device on a dedicated stream lane in the plurality of lanes. The stream signal corresponds to the data and indicates a particular data type of the data. The particular data type can be one of a plurality of different data types capable of being received on the plurality of data lanes of the link.

METHOD FOR COMMUNICATION OF A COMPONENTIZED APPLICATION, COMPUTING DEVICE AND COMPUTER STORAGE MEDIUM
20220245080 · 2022-08-04 ·

A method for communication of a componentized application is described, including acquiring, by the source routing bus component, a routing message to be sent, in response to a message type of the routing message being an out-of-app message to be sent to a first target component included in a target application, establishing, by the source routing bus component, an external binding routing by binding a remote service, the external binding routing being a message transmission path between the source routing bus component and a target message dispatch service component in the target application to which the routing message is to be sent, and sending, by the source routing bus component, the routing message to the target message dispatch service component through the external binding routing, so that the first target component in the target application obtains the routing message.

Systems and methods for floating paddle card enablement

An information handling system may include a motherboard and a floating paddle card. The motherboard may include a host system comprising a host system processor, a logic device configured to perform a functionality of the information handling system in accordance with code stored on non-transitory computer-readable media of the logic device, and a management controller communicatively coupled to the host system processor and the logic device and configured to perform out-of-band management of the information handling system. The floating paddle card may be communicatively coupled to the motherboard and configured to serve as interface between one or more devices coupled to the floating paddle card and the logic device and the management controller, the floating paddle card comprising a microcontroller unit configured to, alone or in combination with other circuitry of the floating paddle card, divide management of the one or more devices between the motherboard and the floating paddle card.