Systems and methods disclosed herein include those that may receive a memory request including a requested memory address and may send the memory request directly to an address decoder associated with a stacked-die memory vault without knowing whether a repair address is required. If a subsequent analysis of the memory request shows that a repair address is required, an in-process decode of the requested memory address can be halted and decoding of the repair address initiated.

A hardware coding mechanism is described. The coding mechanism may include a first encoder to produce a first code using a base number of bits and a second encoder to produce a second code using a supplementary number of bits. The second code and the first code together may be stronger than the first code alone. A mode register stored in a storage may specify whether a switch to the second encoder is open or closed: the first coder is always used.

A computing system may be provided. The computing system may include a host device and a plurality of interface devices. The plurality of interface devices may be configured to communicate with the host device through a host bus. Each of the plurality of interface devices may be configured to perform an interfacing operation between the host device and a memory device. The interfacing operation may include a serial interfacing operation and a parallel interfacing operation.

Persistent caching of memory-side cache content for devices, systems, and methods are disclosed and discussed. In a system including both a volatile memory (VM) and a nonvolatile memory (NVM), both mapped to the system address space, software applications directly access the NVM, and a portion of the VM is used as a memory-side cache (MSC) for the NVM. When power is lost, at least a portion of the MSC cache contents is copied to a storage region in the NVM, which is restored to the MSC upon system reboot.

Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes first-in first-out (FIFO) cells included in an asynchronous FIFO unit and first and second circuits included in the asynchronous FIFO unit. The first circuit provides first information based on a value of a first bit from each of the FIFO cells in order to select one of the FIFO cells to be a selected FIFO cell for storing data information in the selected FIFO cell. The second circuit provides information based on a value of a second bit from each of the FIFO cells in order to select one of the FIFO cells to be a selected FIFO cell for reading data information from the selected FIFO cell.

Systems and methods disclosed herein include those that may receive a memory request including a requested memory address and may send the memory request directly to an address decoder associated with a stacked-die memory vault without knowing whether a repair address is required. If a subsequent analysis of the memory request shows that a repair address is required, an in-process decode of the requested memory address can be halted and decoding of the repair address initiated.

An information handling system and method provide for receiving, at an information storage device, a specification of reporting criteria for a plurality of information storage device parameters, receiving a specification of logical relationships for the reporting criteria, monitoring information storage device parameter values for the information storage device parameters, comparing the information storage device parameter values to the reporting criteria to obtain indications of whether the reporting criteria have been satisfied, applying the logical relationships to the indications, and, in response to the logical relationships applied to the indications yielding a first result, transmitting an alert notification including information storage device parameter values in the form of a single contiguous message for which a corresponding command to send the single contiguous message has not been received by the information storage device.

Apparatuses, systems, methods, and computer program products are disclosed for accessing non-volatile memory. An apparatus includes one or more memory die. A memory die includes an array of non-volatile memory cells, a set of ports, and an on-die controller. A set of ports includes a first port and a second port. A first port includes a first plurality of electrical contacts and a second port includes a second plurality of electrical contacts. An on-die controller communicates via a set of ports to receive command and address information and to transfer data for data operations on an array of non-volatile memory cells. An on-die controller uses a first port to receive command and address information and to transfer data. An on-die controller uses a second port to transfer data but not to receive command and address information.

A method receives an inbound request to be processed based on multiple outbound service invocations of multiple outbound services. The method accesses expected response times for the inbound request for each of the multiple outbound services. The method determines which one or more of the multiple outbound services to invoke asynchronously and which one or more of the multiple outbound services to invoke synchronously based on the expected response times for the inbound request for each of the multiple outbound services. The method invokes asynchronously the one or more of the multiple outbound services determined to be invoked asynchronously, invokes synchronously the one or more of the multiple outbound services determined to be invoked synchronously.

Described embodiments provide systems and processes for performing data migration in a storage system. One or more volumes are migrated from a source device to a target device in a storage system. A discovery state of the migrated volumes is determined by one or more host devices in communication with the storage system. An initiator group is configured for each host device. Each initiator group sends at least one inquiry to each of one or more volumes of the target devices. Responses to each inquiry from each volume are tracked. The system receives a selection of one or more migrated volumes to include in a cutover operation, the selection based at least in part upon the determined discovery states. One or more volumes of the source devices associated with the included volumes are deactivated.