G06F13/4239

Selectively programming data in multi-level cell memory
09542312 · 2017-01-10 · ·

Devices, systems, methods, and other embodiments associated with accessing memory are described. In one embodiment, a method detects that a power quality associated with a volatile memory in a computing device meets a threshold value and in response thereto, reprogramming data from the volatile memory to a flash memory comprising multi-level cells. The reprogramming comprises: copying the data from the volatile memory, and writing the copied data: (1) to the most significant bits of the multi-level cells in the flash memory while skipping the least significant bits of the multi-level cells, or (2) to the least significant bits of the multi-level cells while skipping the most significant bits.

Control method for reading operation of memory device

A control method, for controlling a reading operation of a memory device, includes the following steps. A toggle signal is provided to the memory device, and the toggle signal has a toggle frequency. A reading operation of a page of the memory device is performed according to the toggle signal, wherein the page includes a plurality of chunks. The toggle frequency is set as a target toggle frequency, and the reading operation of a first chunk of the page is performed according to the target toggle frequency, so as to receive a data signal of the memory device. After the reading operation of the first chunk is completed, the toggle frequency is selectively adjusted to perform the reading operation of a second chunk after the first chunk according to a stable state of the data signal and the data strobe signal.

STORAGE SYSTEM AND OPERATING METHOD OF THE SAME
20250355571 · 2025-11-20 ·

An operating method of a storage system includes transmitting a first access command to a first non-volatile memory device, checking a status of the first non-volatile memory device, and performing a first ZQ calibration on the first non-volatile memory device through a DQ pin of the first non-volatile memory device during a time when the first non-volatile memory device is in a busy status.