A display device is provided and includes a first substrate; a second substrate opposed to the first substrate; a liquid crystal layer between the first substrate and the second substrate; a plurality of detection electrodes, the second substrate being located between the detection electrodes and the liquid crystal layer; a shield electrode apart from the detection electrodes in a plane view, the second substrate being located between the shield electrode and the liquid crystal layer; and a resistive layer overlapping the detection electrodes and the shield electrode, the detection electrodes and the shield electrode located between the resistive layer and the second substrate.

A gamma voltage generating circuit includes a gamma buffer configured to output a gamma voltage, a first gamma line and a second gamma line providing an output path of the gamma voltage, an output selecting unit configured to connect an output terminal of the gamma buffer to one of the first gamma line and the second gamma line, and an output resistor unit having a first resistor connected to the first gamma line and a second resistor connected to the second gamma line. The second resistor has a resistance value different from that of the first resistor.

The present disclosure provides a panel driving device and a panel device. The panel driving device includes a transmitting device, a receiving device, a conversion device, and a driver circuit. The transmitting device includes a first transmitting circuit for transmitting a first signal. The receiving device is provided on the panel and including a first receiving circuit for receiving the first signal transmitted by the transmitting device. The conversion device is connected to one of the first transmitting circuit and the first receiving circuit and is configured to convert a second signal received by the conversion device and output a third signal. The driver circuit is provided on the panel and is configured to output a driving signal according to the third signal and provide the driving signal to the panel.

A driving method of display panel and a display device are provided, the driving method includes: taking a time duration of scanning at least two adjacent columns of pixel units as a driving period, a common electrodes of sub-pixels in the pixel units of a preset row are driven by different preset voltages in the current driving period, and the sub-pixels does not need to be driven by doubling the metal wiring and the driving device, thus to achieve the purpose of saving cost; and when the preset voltage is a positive or negative polarity driving voltage, the high voltage sub-pixel and the low-voltage sub-pixel in the pixel unit are driven by a preset driving mode.

A display device includes a voltage generation circuit that generates a plurality of clock signals and a first driving voltage, a second driving voltage, and a third driving voltage. A gate driving circuit receives the generated clock signals and the first driving voltage, the second driving voltage, and the third driving voltage, and includes a plurality of driving stages each of which outputs a carry signal and a gate signal to a corresponding gate line among gate lines. The voltage generation circuit sets a voltage level of the third driving voltage based on a signal of a first node of at least one of the driving stages.

A gate driver for a display device includes: a clock signal line to transfer a clock signal; and a plurality of stages to sequentially output a gate signal based upon the clock signal in response to a carry signal. The plurality of stages include a plurality of thin film transistors, and at least one of the plurality of thin film transistors includes a thin film transistor including an oxide semiconductor. The at least one thin film transistor includes a first gate electrode and a second gate electrode disposed in different layers, the oxide semiconductor is disposed between the first gate electrode and the second gate electrode, and the first gate electrode and the second gate electrode are connected to receive a common voltage signal.

The flicker performance manager disclosed herein implements a method including measuring a liquid crystal (LC) common voltage (VCOM) over a predetermined period of operation an LCD panel having a plurality of LCs, determining a shift in the VCOM (VCOM shift) over the predetermined period based at least in part on the measured VCO, storing the VCOM shift as a function of time in a table of an embedded controller, receiving a power-on signal for the LCD panel and adjusting a VCOM reference level applied to the LCs based at least in part on the stored values of the VCOM shift.

A display device includes a display panel including a plurality of pixels which are connected to a plurality of gate lines and a plurality of data lines and display a plurality of consecutive frames of images, a data driver driving the data lines, a gate driver driving the gate lines, a clock generator outputting a gate clock signal, which drives the gate driver and swings between a gate-on voltage and a gate-off voltage, and a signal controller outputting a gate pulse signal which drives the clock generator and a data control signal which controls the data driver. The clock generator includes a voltage maintainer maintaining the gate clock signal at a reference voltage that has a fixed value between the gate-on voltage and the gate-off voltage for a predetermined time.

A display driving circuit for driving a display panel includes a control logic that adjusts brightness of a first partial area by adjusting pixel data values included in partial image data to be displayed on the first partial area of the display panel based on received brightness control information, and a data driver that generates image signals by digital-analog conversion of pixel data values provided from the control logic, the data driver providing the image signals to the display panel.

The present disclosure relates to the field of display technologies, and provides a gamma circuit. The gamma circuit includes: a plurality of positive gamma voltage output terminals, a plurality of negative gamma voltage output terminals in one-to-one correspondence with the plurality of positive gamma voltage output terminals, and a plurality of voltage conversion circuits. Each of the voltage conversion circuits is configured to output a negative gamma reference voltage to the negative gamma voltage output terminal based on a positive gamma reference voltage output by the positive gamma voltage output terminal corresponding to the negative gamma voltage output terminal.