Disclosed is a test device for testing a high-frequency and high-speed semiconductor. The test device includes a probe supporting block formed with a tube accommodating portion along a test direction; a conductive shield tube accommodated in the tube accommodating portion; and a probe accommodated and supported in the shield tube without contact, the tube accommodating portion including a conductive contact portion for transmitting a ground signal to the shield tube. When a high-frequency and high-speed semiconductor or the like subject is tested, the test device easily and inexpensively prevents crosstalk between the adjacent signal probes and improves impedance characteristic.

A relay pogo contact first charged device model test head apparatus for relay-based contact first field induced charged device model testing has a ground plane of conductive material, a coaxial connector whose outer conductor electrically connects to the ground plane, a current-sensing element with one terminal electrically connects to the ground plane and the other terminal electrically connects to the center conductor of the coaxial connector, a switch where the first terminal electrically connects to a center conductor of the coaxial connector, and a probe with one end electrically connected to a second terminal of the switch and the other end exposed to contact external objects.

A probe card includes a sub-board, having a heating layer, connected to a probe pin. A main board is connected to the sub-board and includes a first output terminal configured to output first power received from a first power supply to the heating layer in a first mode. A power converter is configured to lower a first voltage corresponding to residual power received from the first power supply to a second voltage and output the residual power in a second mode. A second output terminal is configured to receive the residual power from the power converter and second power from a second power supply and output third power including the residual power and the second power to a device under test in the second mode. A first switch unit is connected to the first power supply, the first output terminal, and the power converter.

A semiconductor device for testing a device under test includes a circuit board, a plurality of probes disposed below the circuit board and facing the device under test, an integrated substrate disposed between the circuit board and the plurality of probes, and signal-transmitting module disposed on the circuit board and next to the integrated substrate. The plurality of probes is electrically coupled to the circuit board through the integrated substrate, and the signal-transmitting module transmits a test signal to the plurality of probes through the integrated substrate and the circuit board to perform a test to the device under test. Another semiconductor device including the integrated substrate and a manufacturing method thereof are provided.

A wafer test device includes a test interconnect to interface with a microcircuit of the wafer at a first side and an interposer to interface with the test interconnect at a second side of the test interconnect, opposite the first side. The interposer connects the test interconnect, via a printed circuit board (PCB), to a test apparatus that determines and controls test patterns that are applied to the microcircuit via the test interconnect. A support structure supports the test interconnect and the interposer. The support structure includes an inner bearing to tilt the test interconnect to match a tilt of a surface of the microcircuit. An elastomer between the test interconnect and the interposer reduces deflection of the test interconnect during a process of connecting the test interconnect to the microcircuit.

A pogo pin-free testing device for IC chip test includes a load board, a ceramic interposer disposed on the load board, and copper core balls. The ceramic interposer has first and second surfaces and connecting points, and the second surface of the ceramic interposer faces the load board. Each connecting point has through holes penetrating the first and second surfaces, and an inner sidewall surface thereof has a metallization layer. The metallization layer is extended to a portion of the first surface and a portion of the second surface. In each of the connecting points, an area of an extending portion of the metallization layer extended to the second surface is less than an area of an extending portion of the metallization layer extended to the first surface. The copper core balls are disposed between the load board and the through holes of each connecting point of the ceramic interposer.

A probe card and a wafer testing assembly thereof are provided. The wafer testing assembly includes a printed circuit board, a space transformer, a plurality of copper pillars and a plurality of strengthening structure units. The printed circuit board includes a bottom surface and a plurality of first contacts arranged on the bottom surface. The space transformer includes a top surface and a plurality of second contacts. The second contacts are arranged on the top surface and corresponding to the first contacts. The copper pillars are respectively arranged between the first contacts and the second contacts. Two ends of each of the copper pillars are respectively electrically connected to the first contacts and the second contacts. The strengthening structure units are arranged on the bottom surface of the printed circuit board and respectively surrounding the copper pillars.

When a load necessary for inspection is applied to a cylindrical body in the axial direction thereof, an end of the first bar-like main body is located closer to the other end side of the cylindrical body than one end of a support portion in a support member that supports the body portion, an end of the second bar-like main body is located closer to one end side of the cylindrical body than the other end of the support portion, the body portion is located in the entire portion where the support portion is located, and a radial distance between the outer peripheral surface of the axial central portion of at least one of the first spring portion and the second spring portion and the support member is larger than the distance between the body portion and the support portion.

A test head assembly for a semiconductor device has a carrier, a pin seat and a test wire assembly. The carrier is formed in an L shape and has a lateral board, a perpendicular board and a opening formed through the perpendicular board. The pin seat is mounted in the corresponding opening. The test wire assembly has a teat head, a plurality of connectors and a plurality of test wires. The test head is mounted on an outer sidewall of the lateral board and connected to the pin seat through the test wires and the connectors. Therefore, the pin seat is mounted on the perpendicular board of the L-shaped uprightly and the test head is mounted on the lateral board. The pin seat and the test head are not parallel to each other, and a lateral size of the test head assembly is reduced to increase the space usage.

A circuit board includes an insulating substrate having a first surface and a second surface opposite to the first surface, a solid conductor located inside the insulating substrate, a first via conductor connected to the solid conductor from a side of the first surface, and a second via conductor connected to the solid conductor from a side of the second surface. The solid conductor has a cutout that intersects a line segment that connects a node of the first via conductor and a node of the second via conductor to each other.