A chip testing system and an environment control apparatus are provided. The chip testing system includes the environment control apparatus, a central control device, and a chip testing device. The environment control apparatus includes an apparatus body and a pressing device. When the chip testing device is disposed in an accommodating chamber of the apparatus body, and the central control device controls the pressing device to press a plurality of side surfaces of a plurality of chips carried by the chip testing device, the central control device controls the chip testing device to perform a testing operation to the chips. After the chip testing device performs the testing operation to the chips, a plurality of movable members of the pressing device protrude from a contacting surface of the pressing device and push the chips to separate the chips and the contacting surface.

The present invention proposes a chip reliability test assembly, which comprises a motherboard and a daughter board. The motherboard is used to support the chips during an aging acceleration process at high temperature. The daughter board is used to measure the electricity of chip after the aging acceleration process. Each chip holder is removable off the motherboard. The daughter board does not go through the aging acceleration process and can be reusable.

A testing apparatus including a base and a preheating unit arranged on the base is provided. The preheating unit includes a gas generator, a blocking mechanism and a heating device. The gas generator is configured to discharge air toward the base to form an air wall. The blocking mechanism is located above the air wall and forms a heat preservation space with the air wall. The heating device is arranged in the heat preservation space.

An electronic component handling apparatus that handles a pressed body including a DUT or a carrier accommodating the DUT, includes: a pressing device that electrically connects the DUT to a socket by pressing the pressed body toward the socket, and includes: a contact plate that contacts the pressed body; and a retainer that holds the contact plate, the contact plate being separated from the retainer while the contact plate contacts the pressed body, and the contact plate being held by the retainer while the contact plate is separated from the pressed body.

A method and apparatus for conducting burn-in testing of semiconductors is provided. A semiconductor device under test (DUT) with a plurality of contact pads is placed into a seal carrier. The seal carrier is then placed within a plurality of first inner walls of an outer housing of a burn-in testing apparatus that is fastened to a cold plate through a printed circuit board (PCB). The seal carrier has a plurality of second inner walls that define a recessed cavity. A lid is placed over the seal carrier and fastened to the outer housing to seal the recessed cavity. The recessed cavity is pneumatically pressurized to force the contact pads of the semiconductor DUT into electrical contact with a plurality of resiliently compressible pins of a socket of the PCB. The socket is then energized to conduct a burn-in test of the semiconductor DUT.

A chip testing system including a tray kit, an insertion member mounting apparatus, a testing apparatus, an insertion member detaching apparatus, and a conveying apparatus are provided. The chip tray kit includes a tray, a plurality of chip fixing members, and a plurality of auxiliary insertion members. The chip fixing members are fixed to the tray and are configured to carry a plurality of chips. The insertion member mounting apparatus can fix the auxiliary insertion members to a side of the chip fixing members, and the auxiliary insertion members can limit a movement range of the chips in the chip fixing members. The insertion member detaching apparatus can detach the auxiliary insertion members. When the chips are tested, a pressing assembly connected to a temperature adjusting device and reaching a predetermined temperature correspondingly presses a surface of each of the chips.

There is provided a placement table having an upper surface on which a device to be processed is placed. The placement table comprises: a top plate having a placement surface for the device; a heating unit configured to heat the top plate; a plurality of temperature sensors configured to acquire temperature of the top plate at desired measurement positions in a plan view; and a positioning unit electrically connected to the temperature sensors and configured to position the temperature sensors at the measurement positions in a plan view. The positioning unit is formed of a flexible substrate having flexibility.

An example test system includes test sites for testing devices under test (DUTs), where the test sites include a test site configured to hold a DUT for testing. The test system includes a thermal control system to control a temperature of the DUT separately from control over temperatures of other DUTs in other test sites. The thermal control system includes a thermoelectric cooler (TEC) and a structure that is thermally conductive. The TEC is in thermal communication with the DUT to control the temperature of the DUT by transferring heat between the DUT and the structure.

An example test system includes a test socket for testing a DUT, a lid for the test socket, and an actuator configured to force the lid onto the test socket and to remove the lid from the test socket. The actuator includes an upper arm to move the lid, an attachment mechanism connected to the upper arm to contact the lid, where the attachment mechanism is configured to allow the lid to float relative to the test socket to enable alignment between the lid and the test socket, and a lower arm to anchor the actuator to a board containing the test socket. The actuator is configured to move the upper arm linearly towards and away from the test socket and to rotate the upper arm towards and away from the test socket.

The systems, apparatuses, and methods herein can provide a multi-site positioning mechanism suitable for long-term testing of a device(s) under test (DUT) (e.g. semiconductor wafers) across a range of temperatures with or without a controlled environment. The systems, apparatuses, and methods herein include mounting components, mechanisms, and structures that can provide excellent mechanical stability, permit relatively close working distance optics with high resolution, enable fine positioning at elevated temperature in a controlled environment with minimal thermal perturbation. The systems, apparatuses, and methods herein can be provided with modularity, for example as modular with rails and test sites that can be easily added or removed, and that can permit access to probe modules in a densely packed array.