A test and measurement system includes a machine learning system configured to communicate with a test automation system, a user interface configured to allow a user to provide one or more user inputs and to provide results to the user, and one or more processors, the one or more processors configured to execute code that causes the one or more processors to receive one or more user inputs through the user interface, the one or more user inputs at least identifying a selected machine learning system configuration to be used to configure the machine learning system, receive a waveform created by operation of a device under test, apply the configured machine learning system to analyze the waveform, and provide an output of predicted metadata about the waveform.

An input selector for electrically connecting one of a plurality of test signals from a device under test to a test and measurement instrument includes a multiplexer having multiple inputs, each of the multiple inputs coupled to a different one of the plurality of test signals from the device under test, and having an output of a selected one of the multiple inputs, and an amplifier coupled to the output of the multiplexer for amplifying the selected test signal of the device under test before being sent as an output of the input selector to the test and measurement instrument. In alternative architectures, two or more amplifiers are coupled to the plurality of test signals, and the multiplexer selects an output of one of the two amplifiers to pass to a measurement instrument for testing.

A high-frequency coaxial attenuator includes a first coaxial cable portion that includes a first center conductor having a first length, and a first insulator of the first length formed around the first center conductor, wherein the first center conductor and the first insulator form a first diameter. A second coaxial cable portion is separated from the first coaxial cable portion by a gap. The second coaxial cable portion includes a second center conductor having a second length, and a second insulator of the second length formed around the second center conductor. A semiconductor material is deposited in the gap between the first coaxial cable portion and the second coaxial cable portion. The semiconductor material may be configured to provide an impedance of 500Ω and provides 20 dB of attenuation, and a 10:1 voltage divider based on a 50Ω input impedance of test equipment.

A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.

A semiconductor device test apparatus for improving a loss rate of a test signal in testing a device under test is provided. The semiconductor device test apparatus includes a probe interface board, a pogo block disposed on the probe interface board and electrically connected to a device under test, an equipment board disposed under the probe interface board, an alternating current (AC) controller, transferring and receiving an AC signal for performing an AC test on at least one of the device under test and the pogo block, being mounted on the equipment board, and a physical layer equalizing (PLE) board disposed between the probe interface board and the equipment board, a first equalizing circuit, decreasing loss of the AC signal, being mounted on the PLE board.

An automated test equipment comprises a tester control configured to broadcast and/or specific upload to matching module input data and/or device-specific data including keys and/or credentials and/or IDs and/or configuration information. The automated test equipment further comprises a channel processing unit configured to transform input data using device specific data in order to obtain device-under-test adapted data for testing the device under test. The channel processing unit further configured to process the DUT data using device specific data in order to evaluate the DUT data. A method and a computer program for testing one or more devices under test in an automated test equipment are also disclosed.

The invention describes an integrated circuit, comprising a functional circuit structure which is configured to provide a functionality; and a test structure configured to set a signal, which is coupled to the functional circuit structure, to a test value in response to a magnetic field impulse, to control a test of the integrated circuit. The invention also describes an apparatus and a method for testing an integrated circuit and a computer program implementing the method. This invention provides a time-effective and cost-effective concept of component testing using magnetic interaction.

A method includes receiving tester configuration data, test pattern data, and tester operation data; configuring a circuit for performing a designated test evaluation; generating a stimulus waveform; converting the stimulus waveform to an analog stimulus signal; transferring the analog stimulus signal to a first terminal of a MTJ DUT at reception of a trigger timing signal; generating time traces based on the trigger timing signal; generating a response signal at a second terminal of the MTJ DUT and across a termination resistor as the analog stimulus signal is transferred through the MTJ DUT; converting the response signal to a digitized response signal indicating its voltage amplitude; and performing the designated test evaluation and analysis function in the configurable circuit based on voltage amplitudes and time values of the stimulus waveform, the digitized response signal, and the timing traces.

A storage unit is used for storing a plurality of interface units. A disposition system then automatically manages interface units. A carrier is provided for accommodating an interface unit. The interface unit is configured for testing semiconductor elements in corresponding test devices. The storage unit is designed for storing a plurality of interface units, the storage unit having a plurality of compartments, each for accommodating one carrier, and each such carrier being designed to accommodate one interface unit. The storage unit comprises at least one alignment element for positionally accurate coupling of a handling device.

A tool with three pins arranged in a row that three pinholes arranged in a row such as those found on a motor controller could easily connect to and disconnect from, that, when connected to a motor controller, identifies which of the three wires is positively charged, and whether the voltage difference is above 9 volts. Should one of the outer two wires be positively charged, and consequently not the middle one, or should the voltage difference be greater than 9 volts, then the motor controller would be faultily wired, consequently breaking any receiver that the motor controller connects to.